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PDF SSM6L14FE Data sheet ( Hoja de datos )

Número de pieza SSM6L14FE
Descripción Field Effect Transistor
Fabricantes Toshiba Semiconductor 
Logotipo Toshiba Semiconductor Logotipo



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SSM6L14FE
TOSHIBA Field-Effect Transistor Silicon N / P Channel MOS Type
SSM6L14FE
Power Management Switch Applications
High-Speed Switching Applications
N-ch: 1.5-V drive
P-ch: 1.5-V drive
N-ch, P-ch, 2-in-1
Low ON-resistance Q1 N-ch:RDS(ON) = 330 mΩ (max) (@VGS = 2.5 V)
RDS(ON) = 240 mΩ (max) (@VGS = 4.5 V)
Q2 P-ch:RDS(ON) = 440 mΩ (max) (@VGS = -2.5 V)
RDS(ON) = 300 mΩ (max) (@VGS = -4.5 V)
Q1 Absolute Maximum Ratings (Ta = 25°C)
1.6±0.05
1.2±0.05
Unit: mm
16
25
34
Characteristics
Symbol
Rating
Drain-source voltage
VDSS
Gate-source voltage
VGSS
Drain current
DC
Pulse
ID
IDP
Q2 Absolute Maximum Ratings (Ta = 25°C)
20
±10
0.8
1.6
Unit
V
V
A
Characteristics
Symbol
Rating
Unit
Drain-source voltage
Gate-source voltage
Drain current
DC
Pulse
VDSS
VGSS
ID
IDP
20
±8
0.72
1.44
V
V
A
Absolute Maximum Ratings (Ta = 25 °C) (Q1, Q2 Common)
1.Source1 4.Source2
2.Gate1
5.Gate2
3.Drain2
ES6
6.Drain1
JEDEC
JEITA
TOSHIBA
2-2N1D
Weight: 3.0 mg (typ.)
Characteristics
Symbol
Rating
Unit
Power dissipation
PD(Note 1)
150
mW
Channel temperature
Tch 150 °C
Storage temperature range
Tstg
55 to 150
°C
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the
operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling
Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated
failure rate, etc).
Note1: Mounted on an FR4 board. (total dissipation)
(25.4 mm × 25.4 mm × 1.6 mm, Cu Pad: 0.135 mm2 × 6 )
Marking
654
Equivalent Circuit (top view)
65
4
LL5
Q1 Q2
123
12
3
1
2010-03-25

1 page




SSM6L14FE pdf
Q1 (N-ch MOSFET)
Vth – Ta
1.0
Common Source
ID = 1 mA
VDS = 3 V
0.5
0
50 0
50 100 150
Ambient temperature Ta (°C)
10000
1000
Common Source
VGS = 0 V
Pulse Test
D
IDR
IDR – VDS
G
100
S
Ta = 100°C
10
25°C
25°C
1
0 0.5 1 1.5
Drain–source voltage VDS (V)
10000
5000
1000 toff
500 tf
100
50
ton
10
5 tr
1
1
t – ID
Common Source
VDD = 10 V
VGS = 0 to 2.5 V
Ta = 25°C
10 100 1000
Drain current ID (mA)
10000
SSM6L14FE
10
5
3
1
0.5
0.3
0.1
0.05
0.03
0.01
1
Yfs– ID
Common Source
VDS = 3 V
Ta = 25°C
Pulse Test
10
100
1000
10000
Drain current ID (mA)
Capacitance – VDS
1000
500
100 Ciss
50
Coss
10 Crss
5 Common Source
VGS = 0 V
f = 1 MHz
Ta = 25°C
1
0.1 0.5
1
5 10
Drain–source voltage VDS
50
(V)
100
Dynamic Input Characteristic
10
Common Source
ID = 0.8 A
Ta = 25°C
8
6
VDD = 10 V VDD = 16 V
4
2
0
0 1234
Total Gate Charge Qg (nC)
5 2010-03-25

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