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PDF MIC4224 Data sheet ( Hoja de datos )
| Número de pieza | MIC4224 | |
| Descripción | Low-Side MOSFET Drivers | |
| Fabricantes | Micrel | |
| Logotipo |  |
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MIC4223/MIC4224/MIC4225
Dual 4A, 4.5V to 18V, 15ns Switch Time,
Low-Side MOSFET Drivers with Enable
General Description
The MIC4223/MIC4224/MIC4225 are a family of a dual 4A,
High-Speed, Low-side MOSFET drivers with logic-level
driver enables. The devices are fabricated on Micrel’s
Bipolar/CMOS/DMOS (BCD) process and operate from a
4.5V to 18V supply voltage. The devices parallel Bipolar
and CMOS output stage architecture provides high-current
throughout the MOSFETs Miller Region allowing the driver
to sink and source 4A of peak current from a 12V supply
and quickly charge and discharge a 2000pF load
capacitance in under 15ns, while allowing the outputs to
swing within 0.3V of VDD and 0.16V of ground.
The MIC4223/MIC4224/MIC4225 driver and enable inputs
feature TTL and CMOS logic-level thresholds which are
independent of supply voltage. Each driver features a
dedicated active-high enable input which is internally
pulled high to VDD through 100kΩ, allowing the pins to be
left unconnected if it is not required to disable the driver
outputs. The driver inputs have been designed to protect
against ground bounce and are protected to withstand -5V
of voltage swing at -40mA. Driver outputs are also
protected to withstand 500mA of reverse current.
The MIC4223/MIC4224/MIC4225 are available in three
configurations using industry standard pin out; dual
inverting (MIC4223), dual non-inverting (MIC4224) and
complimentary (MIC4225). They are available in 8-pin
SOIC and thermally enhanced e-PAD 8-pin MSOP and
support operating junction temperatures from -40°C to
+125°C.
Applications
• High-Efficiency MOSFET switching
• Switch mode power supplies
• DC-to-DC converters
• Motor and solenoid drivers
• Clock and line drivers
• Synchronous rectifiers
• Pulse transformer drive
• Class D switching amplifiers
Features
• 4.5V to 18V supply voltage operating range
• High peak source/sink current
– ±3A at VDD = 8V
– ±4A at VDD = 12V
• 15ns/15ns Rise and Fall times with 2000pF load
• 25ns/35ns (Rising/Falling) input propagation delay
• 20ns/45ns (Rising/Falling) enable propagation delay
• Active-high driver enable inputs with 100kΩ pull-ups
• CMOS and TTL logic input and enable thresholds
independent of supply voltage
• Driver input protection to -5V at -40mA
• Output Latch-up protection to >500mA reverse current
• Industry standard pin out with two package options
– ePAD MSOP-8 (θJA = 60°C/W)
– 8-pin SOIC (θJA = 120°C/W)
• Available in dual-inverting (MIC4223), dual non-
inverting (MIC4224) and complementary (MIC4225)
• Dual output drive by paralleling channels
• -40°C to +125°C operating junction temperature range
Block Diagram
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
June 2009
M9999-061109-A
(408) 944-0800
1 page  
Micrel, Inc.
Typical Characteristics
Conditions: TA =25ºC.
VINA, B Threshold vs. VDD
2.2
2.15
2.1
VIH
2.05
2
1.95
1.9
VIL
1.85
1.8
4 6 8 10 12 14 16 18
VDD (V)
Enable Threshold vs.
T emperature
2.1
2.0 VDD =12V
1.9 VEN_H
1.8
1.7
1.6
1.5
VEN_L
1.4
1.3
-40 -20
0 20 40 60 80 100 120 140
Temperature (°C)
IDD vs. Temperature
(Disabled)
1.2
1.0 VDD = 12; VIN = VDD
0.8
VDD = 4.5V; VIN = VDD
0.6
0.4 VDD = 12V; VIN = 0
0.2
0.0
-40 -20
VDD = 4.5V; VIN = 0
0 20 40 60 80 100 120 140
Temperature (°C)
IDD vs. Frequency (VDD = 5V)
Both Drivers Switching
50
40
2.2nF
30
1nF
20
10
0
0
470pF
500
1000
1500
Frequency (kHz)
2000
June 2009
VINA, B Threshold vs.
Temperature
2.3
VDD =12V
2.2
2.1 VIH
2.0
1.9 VIL
1.8
1.7
-40 -20
0 20 40 60 80 100 120 140
Temperature (°C)
IDD vs. VDD (Disabled)
1.2
VINA = VINB = VDD
1.0
0.8
0.6
0.4 VINA = VINB = 0
0.2
0.0
4 6 8 10 12 14 16 18
VDD (V)
IDD vs. Temperature
(Enabled)
1.4
VDD = 12; VIN = VDD
1.2
1.0
VDD = 4.5; VIN = VDD
0.8
0.6 VDD = 12; VIN = 0
0.4
0.2 VDD = 4.5V; VIN = 0
0.0
-40 -20
0 20 40 60 80 100 120 140
Temperature (°C)
IDD vs. Frequency (VDD = 5V)
Both Drivers Switching
180
160
140
120 10nF
100
80 4.7nF
60
40
20
0
0 500 1000 1500 2000
Frequency (kHz)
5
MIC4223/MIC4224/MIC4225
VENA, B Threshold vs. VDD
2.0
1.8 VEN_H
1.6
1.4 VEN_L
1.2
1.0
4 6 8 10 12 14 16 18
VDD (V)
IDD vs. VDD (Enabled)
1.4
1.2 VINA=VINB=VDD
1.0
0.8
0.6 VINA = VINB = 0
0.4
0.2
0.0
4 6 8 10 12 14 16 18
VDD (V)
IDD vs. Temperature
(Switching)
4.0
3.5
3.0
2.5
2.0 VDD = 12V; VIN = 500kHz
1.5
1.0
0.5 VDD = 4.5V; VIN = 500kHz
0.0
-40 -20
0 20 40 60 80 100 120 140
Temperature (°C)
IDD vs. Frequency (VDD = 12V)
Both Drivers Switching
120
100
2.2nF
80
60
1nF
40
20
470pF
0
0 500 1000 1500 2000
Frequency (kHz)
M9999-061109-A
(408) 944-0800
5 Page 
Micrel, Inc.
Quiescent Current Power Dissipation
Quiescent current powers the internal logic, level shifting
circuitry and bias for the output drivers. This current is
proportional to operating frequency and VDD voltage. The
typical characteristic graphs show how supply current
varies with switching frequency and supply voltage.
The power dissipated by the driver’s quiescent current is:
Pdissquiescent = VDD × I DD
Total Power Dissipation and Thermal Considerations
Total package power dissipation equals the power
dissipation of each driver caused by driving the external
MOSFETs plus the supply current.
PdissTOTAL = Pdissquiescent + PdriverA + PdriverB
The die temperature may be calculated once the total
power dissipation is known.
TJ = TA + PdissTOTAL × θ JA
Where:
TA is the Maximum ambient temperature
TJ is the junction temperature (°C)
PdissTOTAL is the power dissipation of the Driver
θJA is the thermal resistance from junction-to-
ambient air (°C/W)
The following graphs help determine the maximum gate
charge that can be driven with respect to switching
frequency, supply voltage and ambient temperature.
Figure 5a shows the power dissipation in the driver for
different values of gate charge with VDD = 5V. Figure 5b
shows the power dissipation at VDD = 12V. Figure 5c show
the maximum power dissipation for a given ambient
temperature for the SOIC and ePAD MSOP packages.
The maximum operating frequency of the driver may be
limited by the maximum power dissipation of the driver
package.
MIC4223/MIC4224/MIC4225
PDISS: GATE Charge
vs. Frequency
1.4
VDD=5V
1.2
50nC
1.0 40nC
0.8 30nC
0.6
20nC
0.4
0.2 10nC
0
100k
1M
FREQUENCY (Hz)
10M
Figure 5a. PDISS vs. QG and fS for VDD = 5V
PDISS: GATE Charge
vs. Frequency
2.0
1.8 VDD=12V
50nC 40nC
30nC
1.6
1.4
1.2 20nC
1.0
0.8
0.6 10nC
0.4
0.2
0
100k
1M
FREQUENCY (Hz)
10M
Figure 5b. PDISS vs. QG and fS for VDD = 12V
Maximum Power
Dissipation
2.0
1.5
1.0
0.5
0.0
20 40 60 80 100 120
Ambient Temperature (°C)
140
Figure 5c. Maximum PDISS vs. Ambient Temperature
June 2009
11 M9999-061109-A
(408) 944-0800
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet MIC4224.PDF ] | |
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