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| Número de pieza | PSMN7R6-60BS | |
| Descripción | MOSFET ( Transistor ) | |
| Fabricantes | NXP Semiconductors | |
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PSMN7R6-60BS
N-channel 60 V 7.8 mΩ standard level MOSFET in D2PAK
Rev. 2 — 2 March 2012
Product data sheet
1. Product profile
1.1 General description
Standard level N-channel MOSFET in a D2PAK package qualified to 175 °C. This product
is designed and qualified for use in a wide range of industrial, communications and
domestic equipment.
1.2 Features and benefits
High efficiency due to low switching
and conduction losses
Suitable for standard level gate drive
sources
1.3 Applications
DC-to-DC converters
Load switching
Motor control
Server power supplies
1.4 Quick reference data
Table 1. Quick reference data
Symbol
Parameter
VDS drain-source voltage
ID drain current
Ptot total power dissipation
Tj junction temperature
Static characteristics
RDSon
drain-source on-state
resistance
Dynamic characteristics
QGD gate-drain charge
QG(tot)
total gate charge
Avalanche ruggedness
EDS(AL)S
non-repetitive
drain-source
avalanche energy
Conditions
Tj ≥ 25 °C; Tj ≤ 175 °C
Tmb = 25 °C; VGS = 10 V; see Figure 1
Tmb = 25 °C; see Figure 2
VGS = 10 V; ID = 25 A; Tj = 25 °C;
see Figure 13; see Figure 9
VGS = 10 V; ID = 25 A; VDS = 30 V;
see Figure 15; see Figure 14
VGS = 10 V; ID = 25 A; VDS = 30 V;
see Figure 14; see Figure 15
VGS = 10 V; Tj(init) = 25 °C; ID = 92 A;
Vsup ≤ 100 V; RGS = 50 Ω; unclamped
Min Typ Max Unit
- - 60 V
- - 92 A
- - 149 W
-55 -
175 °C
- 5.9 7.8 mΩ
- 10.6 - nC
- 38.7 - nC
- - 110 mJ
1 page  
NXP Semiconductors
PSMN7R6-60BS
N-channel 60 V 7.8 mΩ standard level MOSFET in D2PAK
6. Characteristics
Table 6. Characteristics
Symbol
Parameter
Static characteristics
V(BR)DSS
drain-source
breakdown voltage
VGS(th)
VGSth
gate-source threshold
voltage
gate-source threshold
voltage
IDSS
IGSS
RDSon
drain leakage current
gate leakage current
drain-source on-state
resistance
RG gate resistance
Dynamic characteristics
QG(tot)
QGS
QGS(th)
total gate charge
gate-source charge
pre-threshold
gate-source charge
QGS(th-pl)
post-threshold
gate-source charge
QGD gate-drain charge
VGS(pl)
Ciss
gate-source plateau
voltage
input capacitance
Coss
output capacitance
Crss
td(on)
tr
td(off)
tf
reverse transfer
capacitance
turn-on delay time
rise time
turn-off delay time
fall time
Conditions
ID = 250 µA; VGS = 0 V; Tj = -55 °C
ID = 250 µA; VGS = 0 V; Tj = 25 °C
ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 10; see Figure 11
ID = 1 mA; VDS = VGS; Tj = 175 °C;
see Figure 11
ID = 1 mA; VDS = VGS; Tj = -55 °C;
see Figure 11
VDS = 60 V; VGS = 0 V; Tj = 25 °C
VDS = 60 V; VGS = 0 V; Tj = 125 °C
VGS = 20 V; VDS = 0 V; Tj = 25 °C
VGS = -20 V; VDS = 0 V; Tj = 25 °C
VGS = 10 V; ID = 25 A; Tj = 175 °C;
see Figure 12
VGS = 10 V; ID = 25 A; Tj = 25 °C;
see Figure 13; see Figure 9
f = 1 MHz
ID = 25 A; VDS = 30 V; VGS = 10 V;
see Figure 14; see Figure 15
ID = 25 A; VDS = 30 V; VGS = 10 V;
see Figure 15; see Figure 14
ID = 25 A; VDS = 30 V; see Figure 14;
see Figure 15
VDS = 30 V; VGS = 0 V; f = 1 MHz;
Tj = 25 °C; see Figure 16; see Figure 8
VDS = 30 V; VGS = 0 V; f = 1 MHz;
Tj = 25 °C; see Figure 16
VDS = 30 V; VGS = 0 V; f = 1 MHz;
Tj = 25 °C; see Figure 16; see Figure 8
VDS = 30 V; RL = 1.2 Ω; VGS = 10 V;
RG(ext) = 4.7 Ω
Min Typ Max Unit
54 - - V
60 - - V
234V
1- - V
- - 4.6 V
- 0.05 10 µA
- - 100 µA
- 2 100 nA
- 2 100 nA
-
13.3 18
mΩ
- 5.9 7.8 mΩ
- 0.98 - Ω
- 38.7 - nC
- 12.9 - nC
- 6.9 - nC
- 6 - nC
- 10.6 - nC
- 5.6 - V
- 2651 - pF
- 342 - pF
- 183 - pF
- 19 - ns
- 21 - ns
- 37 - ns
- 13 - ns
PSMN7R6-60BS
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 2 March 2012
© NXP B.V. 2012. All rights reserved.
5 of 14
5 Page 
NXP Semiconductors
PSMN7R6-60BS
N-channel 60 V 7.8 mΩ standard level MOSFET in D2PAK
8. Revision history
Table 7. Revision history
Document ID
Release date
Data sheet status
PSMN7R6-60BS v.2
Modifications:
20120302
Product data sheet
• Status changed from objective to product.
• Various changes to content.
PSMN7R6-60BS v.1 20111020
Objective data sheet
Change notice
-
-
Supersedes
PSMN7R6-60BS v.1
-
PSMN7R6-60BS
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 2 March 2012
© NXP B.V. 2012. All rights reserved.
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