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PDF PSMN6R5-25YLC Data sheet ( Hoja de datos )
| Número de pieza | PSMN6R5-25YLC | |
| Descripción | N-channel 25V 6.5m ohm logic level MOSFET | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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PSMN6R5-25YLC
N-channel 25 V 6.5 mΩ logic level MOSFET in LFPAK using
NextPower technology
Rev. 1 — 12 July 2011
Objective data sheet
1. Product profile
1.1 General description
Logic level enhancement mode N-channel MOSFET in LFPAK package. This product is
designed and qualified for use in a wide range of industrial, communications and domestic
equipment.
1.2 Features and benefits
High reliability Power SO8 package,
qualified to 175°C
Low parasitic inductance and
resistance
Optimised for 4.5V Gate drive utilising
NextPower Superjunction technology
Ultra low QG, QGD, and QOSS for
high system efficiencies at low and
high loads
1.3 Applications
DC-to-DC converters
Load switching
Synchronous buck regulator
1.4 Quick reference data
Table 1.
Symbol
VDS
ID
Quick reference data
Parameter
drain-source voltage
drain current
Ptot total power dissipation
Tj junction temperature
Static characteristics
RDSon
drain-source on-state
resistance
Dynamic characteristics
QGD
QG(tot)
gate-drain charge
total gate charge
Conditions
25 °C ≤ Tj ≤ 175 °C
Tmb = 25 °C; VGS = 10 V;
see Figure 1
Tmb = 25 °C; see Figure 2
Min Typ Max Unit
- - 25 V
- - 64 A
--
-55 -
48 W
175 °C
VGS = 4.5 V; ID = 20 A;
Tj = 25 °C; see Figure 12
VGS = 10 V; ID = 20 A;
Tj = 25 °C; see Figure 12
- 7.3 8.5 mΩ
- 5.5 6.5 mΩ
VGS = 4.5 V; ID = 20 A;
- 2.8 - nC
VDS = 12 V; see Figure 14; - 8.4 - nC
see Figure 15
1 page  
NXP Semiconductors
PSMN6R5-25YLC
N-channel 25 V 6.5 mΩ logic level MOSFET in LFPAK using NextPower technology
5. Thermal characteristics
Table 5.
Symbol
Rth(j-mb)
Thermal characteristics
Parameter
thermal resistance from junction to mounting base
Conditions
see Figure 5
Min Typ Max Unit
- 2.9 3.13 K/W
10
Zth(j-mb)
(K/W)
003aag138
1 δ = 0.5
0.2
0.1
0.05
10-1
0.02
P δ = tp
T
single shot
tp t
T
10-2
10-6
10-5
10-4
10-3
10-2
10-1
tp (s)
1
Fig 5. Transient thermal impedance from junction to mounting base as a function of pulse duration
PSMN6R5-25YLC
Objective data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 12 July 2011
© NXP B.V. 2011. All rights reserved.
5 of 15
5 Page 
NXP Semiconductors
PSMN6R5-25YLC
N-channel 25 V 6.5 mΩ logic level MOSFET in LFPAK using NextPower technology
7. Package outline
Plastic single-ended surface-mounted package (LFPAK; Power-SO8); 4 leads
SOT669
L1
HD
E
A
A2
C
b2 c2
mounting
base
D1
L2
1 2 34
e b wM A
1/2 e
X
c
E1
b3
b4
A
A1 C
detail X
(A3)
θ
L
yC
0 2.5 5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT A
A1 A2 A3
b
b2 b3 b4
c
c2
D (1)
D1(1)
max
E(1)
E1(1)
e
H
L L1
mm
1.20
1.01
0.15
0.00
1.10
0.95
0.25
0.50
0.35
4.41
3.62
2.2
2.0
0.9
0.7
0.25
0.19
0.30
0.24
4.10
3.80
4.20
5.0
4.8
3.3
3.1
1.27
6.2
5.8
0.85
0.40
1.3
0.8
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
L2 w y
1.3
0.8
0.25
0.1
θ
8°
0°
OUTLINE
VERSION
IEC
REFERENCES
JEDEC
JEITA
SOT669
MO-235
EUROPEAN
PROJECTION
ISSUE DATE
06-03-16
11-03-25
Fig 19. Package outline SOT669 (LFPAK; Power-SO8)
PSMN6R5-25YLC
Objective data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 12 July 2011
© NXP B.V. 2011. All rights reserved.
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