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PDF PSMN6R0-30YLB Data sheet ( Hoja de datos )
| Número de pieza | PSMN6R0-30YLB | |
| Descripción | N-channel 30V 6.5m ohm logic level MOSFET | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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PSMN6R0-30YLB
N-channel 30 V 6.5 mΩ logic level MOSFET in LFPAK using
NextPower technology
Rev. 2 — 24 October 2011
Product data sheet
1. Product profile
1.1 General description
Logic level enhancement mode N-channel MOSFET in LFPAK package. This product is
designed and qualified for use in a wide range of industrial, communications and domestic
equipment.
1.2 Features and benefits
High reliability Power SO8 package,
qualified to 175°C
Low parasitic inductance and
resistance
Optimised for 4.5V Gate drive utilising
NextPower Superjunction technology
Ultra low QG, QGD, & QOSS for high
system efficiencies at low and high
loads
1.3 Applications
DC-to-DC converters
Load switching
Synchronous buck regulator
1.4 Quick reference data
Table 1. Quick reference data
Symbol
VDS
ID
Parameter
drain-source voltage
drain current
Conditions
25 °C ≤ Tj ≤ 175 °C
Tmb = 25 °C; VGS = 10 V;
see Figure 1
Ptot total power dissipation
Tj junction temperature
Static characteristics
Tmb = 25 °C; see Figure 2
RDSon
drain-source on-state resistance VGS = 4.5 V; ID = 20 A; Tj = 25 °C;
see Figure 12
VGS = 10 V; ID = 20 A; Tj = 25 °C;
see Figure 12
Dynamic characteristics
QGD gate-drain charge
VGS = 4.5 V; ID = 20 A; VDS = 15 V;
see Figure 14; see Figure 15
QG(tot)
total gate charge
VGS = 4.5 V; ID = 20 A; VDS = 15 V;
see Figure 14; see Figure 15
Min Typ Max Unit
- - 30 V
- - 71 A
--
-55 -
58 W
175 °C
- 6.9 8.1 mΩ
- 5.5 6.5 mΩ
- 2.6 - nC
- 9 - nC
1 page  
NXP Semiconductors
PSMN6R0-30YLB
N-channel 30 V 6.5 mΩ logic level MOSFET in LFPAK using NextPower technology
5. Thermal characteristics
Table 5.
Symbol
Rth(j-mb)
Thermal characteristics
Parameter
thermal resistance from junction to mounting base
Conditions
see Figure 5
Min Typ Max Unit
- 2.35 2.57 K/W
10
Zth(j-mb)
(K/W)
δ = 0.5
1
0.2
0.1
0.05
10-1
0.02
003aag093
P δ = tp
T
single shot
tp t
10-2
T
10-6
10-5
10-4
10-3
10-2
10-1 tp (s) 1
Fig 5. Transient thermal impedance from junction to mounting base as a function of pulse duration
PSMN6R0-30YLB
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 24 October 2011
© NXP B.V. 2011. All rights reserved.
5 of 15
5 Page 
NXP Semiconductors
PSMN6R0-30YLB
N-channel 30 V 6.5 mΩ logic level MOSFET in LFPAK using NextPower technology
7. Package outline
Plastic single-ended surface-mounted package (LFPAK; Power-SO8); 4 leads
SOT669
L1
HD
E
A
A2
C
b2 c2
mounting
base
D1
L2
1 2 34
e b wM A
1/2 e
X
c
E1
b3
b4
A
A1 C
detail X
(A3)
θ
L
yC
0 2.5 5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT A
A1 A2 A3
b
b2 b3 b4
c
c2
D (1)
D1(1)
max
E(1)
E1(1)
e
H
L L1
mm
1.20
1.01
0.15
0.00
1.10
0.95
0.25
0.50
0.35
4.41
3.62
2.2
2.0
0.9
0.7
0.25
0.19
0.30
0.24
4.10
3.80
4.20
5.0
4.8
3.3
3.1
1.27
6.2
5.8
0.85
0.40
1.3
0.8
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
L2 w y
1.3
0.8
0.25
0.1
θ
8°
0°
OUTLINE
VERSION
IEC
REFERENCES
JEDEC
JEITA
SOT669
MO-235
EUROPEAN
PROJECTION
ISSUE DATE
06-03-16
11-03-25
Fig 19. Package outline SOT669 (LFPAK; Power-SO8)
PSMN6R0-30YLB
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 24 October 2011
© NXP B.V. 2011. All rights reserved.
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