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Número de pieza | SPC4533W | |
Descripción | N & P Pair Enhancement Mode MOSFET | |
Fabricantes | SYNC POWER | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de SPC4533W (archivo pdf) en la parte inferior de esta página. Total 10 Páginas | ||
No Preview Available ! SPC4533W
N & P Pair Enhancement Mode MOSFET
DESCRIPTION
The SPC4533W is the N- and P-Channel enhancement
mode power field effect transistors are produced using
high cell density, DMOS trench technology. This high
density process is especially tailored to minimize on-state
resistance and provide superior switching performance.
These devices are particularly suited for low voltage
applications such as notebook computer power
management and other battery powered circuits where
high-side switching, low in-line power loss, and
resistance to transients are needed.
FEATURES
N-Channel
30V/10A,RDS(ON)= 25mΩ@VGS= 10V
30V/8.0A,RDS(ON)= 36mΩ@VGS= 4.5V
P-Channel
-30V/-6.0A,RDS(ON)= 42mΩ@VGS=- 10V
-30V/-3.0A,RDS(ON)= 78mΩ@VGS=-4.5V
Super high density cell design for extremely low
RDS (ON)
Exceptional on-resistance and maximum DC
current capability
SOP – 8P package design
APPLICATIONS
z Power Management in Note book
z Portable Equipment
z Battery Powered System
z DC/DC Converter
z Load Switch
z LCD Display inverter
PIN CONFIGURATION(SOP – 8P)
PART MARKING
PIN DESCRIPTION
2011/06/03 Ver.1
Page 1
1 page SPC4533W
N & P Pair Enhancement Mode MOSFET
N CHANNEL TYPICAL CHARACTERISTICS
Fig. 1 Typical Output Characteristics
Fig. 2 On-Resistance vs. Gate Voltage
Fig. 3 Forward Characteristics of Diode
Fig. 4 Gate Charge Characteristics
Fig. 5 Vgs vs. Junction Temperature
2011/06/03 Ver.1
Fig. 6 On-Resistance vs. Junction Temperature
Page 5
5 Page |
Páginas | Total 10 Páginas | |
PDF Descargar | [ Datasheet SPC4533W.PDF ] |
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