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PDF EMA1901-50WL09GRR Data sheet ( Hoja de datos )
| Número de pieza | EMA1901-50WL09GRR | |
| Descripción | 1.25W Mono Audio Power Amplifier | |
| Fabricantes | Elite Semiconductor | |
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ESMT/EMP
EMA1901
1.25W Mono Audio Power Amplifier
General Description
The EMA1901 is an audio power amplifier primarily designed
for portable communication applications such as mobile
phones and portable multimedia players (PMP). To an 8Ω
BTL load, it can deliver 1.25 watt of continuous average
power with less than 1% distortion (THD+N) from a 5VDC
supply. Typical THD+N is about 0.015% at 1Watt.
The EMA1901 is pin-compatible to National Semi’s LM4890
Micro-SMD package with a superior (THD+N). It does not
require output coupling capacitors or bootstrap capacitors,
and is ideal for mobile phone and other low voltage
applications where minimal power consumption is a
primary requirement.
The EMA1901 features a low-power consumption shutdown
mode, and an internal thermal shutdown protection
mechanism. Advanced pop & click circuitry is built in to
eliminate noises that would otherwise occur during turn-on
and turn-off transitions. The EMA1901 is unity-gain stable
and can be configured by external gain-setting resistors.
EMP products are RoHS and Halogen free compliant.
Key Specifications
PSRR at 217Hz, VDD = 5V (Fig. 1)
Power Output at 5.0V & 1% THD
Power Output at 2.6V & 1% THD
Shutdown Current
60dB(typ.)
1.25W(typ.)
300mW(typ.)
< 1µA(typ.)
Features
Available in space-saving WL-CSP package
Ultra low current shutdown mode
BTL output driving capacitive loads
Improved pop & click circuitry eliminating noises
during turn-on and turn-off transitions
2.5 - 5.5V operation
No output coupling capacitors, snubber networks or
bootstrap capacitors required
Thermal shutdown protection
Unity-gain stable
External gain configuration capability
Applications
Mobile Phones
PDAs and PMPs
Portable Electronic Device
Connection Diagram
WL-CSP Package
Elite Semiconductor Memory Technology Inc./Elite MicroPower Inc.
Publication Date : Aug. 2009
Revision : 5.1
1/14
1 page  
ESMT/EMP
EMA1901
Electrical Characteristics VDD = 2.6V (Notes 1, 2, 8)
The following specifications apply for the circuit shown in Figure 1 unless otherwise specified. Limits apply for TA = 25°C.
Conditions
Units
Symbol Parameter
Conditions
Typical
(Note 6)
Limit
(Notes 7, 9)
(Limits)
IDD
Quiescent Power Supply
VIN = 0V, Io = 0A, NoLoad
2.3
Current
VIN = 0V, 8Ω Load
4
7 mA (max)
9 mA (max)
ISD
VSDIH
VSDIL
VOS
PO
TWU
TSD
Shutdown Current
Shutdown Voltage Input High
Shutdown Voltage Input Low
Output Offset Voltage
Output Power ( 8Ω)
Wake-up time
Thermal Shutdown
Temperature
VSHUTDOWN = 0V
THD = 1% (max); f = 1 kHz
Cbypass =1uF
0.1
5
300
100
160
1.0 µA (max)
1.2 V (min)
0.4 V (max)
50 mV (max)
200 mW(min)
350 ms (max)
140 °C (min)
180 °C (max)
THD+N
Total Harmonic Distortion +
Noise
PO = 0.2 Wrms; f = 1kHz
0.01
%
PSRR
(Note 10)
Power Supply Rejection Ratio
Vripple = 200mV sine p-p
Input Terminated with 10
ohms to ground
60 (f =217Hz)
65 (f = 1kHz)
55 dB (min)
TSDT Shut Down Time
8 Ω load
0.1 ms (max)
Note 1: All voltages are measured with respect to the ground pin, unless otherwise specified.
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings
indicate conditions for which the device is functional, but do not guarantee specific performance limits. Electrical
Characteristics state DC and AC electrical specifications under particular test conditions, which guarantee specific
performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for
parameters where no limit is given, however, the typical value is a good indication of device performance.
Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the
ambient temperature TA. The maximum allowable power dissipation is PDMAX = (TJMAX–TA)/ θJA or the number given in
Absolute Maximum Ratings, whichever is lower. For the EMA1901, see power derating curves for additional information.
Note 4: Human body model, 100 pF discharged through a 1.5 kΩresistor.
Note 5: Machine Model, 220 pF–240 pF discharged through all pins.
Note 6: Typicals are measured at 25°C and represent the parametric norm.
Note 7: Limits are guaranteed to EMP’s AOQL (Average Outgoing Quality Level).
Note 8: Shutdown current is measured in a Normal Room Environment. Exposure to direct sunlight will increase ISD by a
maximum of 2µA.
Note 9: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.
Note 10: PSRR is a function of system gain. Specifications apply to the circuit in Figure 1 where AV = 2. Higher system gains will
reduce PSRR value by the amount of gain increase. A system gain of 10 represents a gain increase of 14dB. PSRR will be
reduced by 14dB and applies to all operating voltages.
External Components Description (Figure 1)
Components Functional Description
1. R2
2. C2
3. Rf
4. C1
Inverting input resistance for setting the closed-loop gain in conjunction with Rf. This resistor also
forms a high pass filter with C2 at fC= 1/(2π R2 C2).
Input coupling capacitor for blocking the DC voltage at the amplifier’s input terminals. Also
creates a high pass filter with C2 at fC= 1/(2π R2 C2). Refer to the section, Proper Selection of
External Components, for an explanation of how to determine the value of C2.
Feedback resistance for setting the closed-loop gain in conjunction with R2.
Supply bypass capacitor for providing power supply filtering. Refer to the section, Power Supply
Bypassing, for information concerning proper placement and selection of the supply bypass
5. C3
capacitor, C3.
Bypass pin capacitor for providing half-supply filtering. Refer to the section, Proper Selection of
External Components, for information concerning proper placement and selection of C3.
Elite Semiconductor Memory Technology Inc./Elite MicroPower Inc.
Publication Date : Aug. 2009
Revision : 5.1
5/14
5 Page 
ESMT/EMP
EMA1901
PCB LAYOUT GUIDELINES
This section provides practical guidelines for mixed signal
PCB layout that involves various digital/analog power and
ground traces. Designers should note that these are only
"rule-of-thumb" recommendations and the actual results will
depend heavily on the final layout.
GENERAL MIXED SIGNAL LAYOUT
RECOMMENDATIONS
Power and Ground Circuits
For 2 layer mixed signal design, it is important to isolate the
digital power and ground trace paths from the analog
power and ground trace paths. Star trace routing
techniques (bringing individual traces back to a central
point rather than daisy chaining traces together in a serial
manner) can have a major impact on low level signal
performance. Star trace routing refers to using individual
traces to feed power and ground to each circuit or even
device. This technique will require a greater amount of
design time but will not increase the final price of the board.
The only extra parts required will be some jumpers.
Single-Point Power / Ground Connections
The analog power traces should be connected to the
digital traces through a single point (link). A "Pi-filter" can be
helpful in minimizing High Frequency noise coupling
between the analog and digital sections. It is further
recommended to put digital and analog power traces over
the corresponding digital and analog ground traces to
minimize noise coupling.
Placement of Digital and Analog Components
All digital components and high-speed digital signals traces
should be located as far away as possible from analog
components and circuit traces.
Avoiding Typical Design / Layout Problems
Avoid ground loops or running digital and analog traces
parallel to each other (side-by-side) on the same PCB layer.
When traces must cross over each other do it at 90 degrees.
Running digital and analog traces at 90 degrees to each
other from the top to the bottom side as much as possible
will minimize capacitive noise coupling and cross talk.
Elite Semiconductor Memory Technology Inc./Elite MicroPower Inc.
11/14
Publication Date : Aug. 2009
Revision : 5.1
11 Page | ||
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