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PDF EUP3402 Data sheet ( Hoja de datos )
| Número de pieza | EUP3402 | |
| Descripción | 2.25MHz Synchronous Step-Down DC/DC Regulator | |
| Fabricantes | Eutech Microelectronics | |
| Logotipo |  |
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EUP3402
Dual 1A, 2.25MHz Synchronous
Step-Down DC/DC Regulator
DESCRIPTION
The EUP3402 is synchronous dual step-down DC-DC
converters optimized for battery powered portable
applications. It provides two independent output voltage
rails powered by 1-cell Li-Ion or 3-cell NiMH/NiCD
batteries. The device is also suitable to operate from a
standard 3.3V or 5V voltage rail.
With an input voltage range of 2.7V to 5.5V, the
EUP3402 is ideal to power portable applications like
smart phones, PDAs and other portable equipment.
The EUP3402 operates at 2.25MHz fixed switching
frequency allowing the use of small inductors and
capacitors to achieve a small solution size. Each output
supports up to 1A load current, typical. The internal
synchronous switch increases efficiency and eliminates
the need for an external schottky diode.
The EUP3402 has a user selectable mode of forced
PWM and PFM/PWM mode. The forced PWM mode
operation provides the lowest ripple noise and the PFM
mode operation provides high efficiency at light loads.
The EUP3402 has internal soft start and avoids inrush
current during startup. When shutdown, internal resistor
discharges the output capacitor.
Typical Application Circuit
FEATURES
High Efficiency Up to 95%
2.25MHz Constant Switching Frequency
Dual 1A Available Load Current
45µA Typical Quiescent Current
2.7V to 5.5V Input Voltage Range
2 Channel 180 Degree Out of Phase Operation
Adjustable Output Voltage as Low as 0.6V
No Schottky Diode Required
Short Circuit and Thermal Protection
Power Good Output
Internal Soft Start Function
Available in 3mm × 3mm TDFN-10 Package
RoHS Compliant and 100% Lead(Pb)-Free
Halogen-Free
APPLICATIONS
SSD Module
Smart Phones
Tablet PC
Portable Media Players
µC/µP, FPGA and DSP Power
Plug-in DC/DC Modules for Routers and
Switchers
DS3402 Ver1.0 Mar. 2012
Figure 1.
1
1 page  
Tel: 0755-8398 3377 / 135 9011 2223
Typical Operating Characteristics
EUP3402
DS3402 Ver1.0 Mar. 2012
5
5 Page 
Tel: 0755-8398 3377 / 135 9011 2223
EUP3402
I =I ×
RMS O
V
O
V
IN
×
1 −
V
O
V
IN
The output capacitor COUT has a strong effect on loop
stability.
The selection of COUT is driven by the required effective
series resistance (ESR). ESR is a direct function of the
volume of the capacitor; that is, physically larger
capacitors have lower ESR. Once the ESR requirement
for COUT has been met, the RMS current rating generally
far exceeds the IRIPPLE(P-P) requirement. The output ripple
∆VOUT in PWM mode is determined by:
∆VOUT
≅
∆I
L
ESR
+
1
8fC OUT
Thermal Considerations
To avoid the EUP3402 from exceeding the maximum
junction temperature, the user will need to do a thermal
analysis. The goal of the thermal analysis is to determine
whether the operating conditions exceed the maximum
junction temperature of the part. The temperature rise is
given by:
TR=(PD)(θJA)
Where PD=ILOAD2 × RDS(ON) is the power dissipated by
the regulator ; θJA is the thermal resistance from the
junction of the die to the ambient temperature.
The junction temperature, TJ, is given by:
TJ=TA+TR
Where TA is the ambient temperature.
TJ should be below the maximum junction temperature
of 125°C.
In some cases, 0.1µF to 1µF of ceramic capacitors
should also be placed closed to EUP3402 in parallel with
the main capacitors for high frequency decoupling.
When choosing the input and output ceramic capacitors,
choose the X5R or X7R dielectric formulations. These
dielectrics have the best temperature and voltage
characteristics of all the ceramics for a given value and
size.
Output Voltage Programming
The output voltage is set by a resistive divider according
to the following formula:
VOUT
=
0.6V1 +
R2
R1
The external resistive divider is connected to the output,
allowing remote voltage sensing as shown in Figure 4.
PC Board Layout Checklist
When laying out the printed circuit board, the following
guidelines should be used to ensure proper operation of
the EUP3402.
1. The input capacitor CIN should connect to VIN as
closely as possible. This capacitor provides the AC
current to the internal power MOSFETs.
2. The power traces, consisting of the GND trace, the
SW1, SW2 trace and the VIN trace should be kept
short, direct and wide.
3. The FB1 and FB2 pin should connect directly to the
feedback resistors. The resistive divider R1/R2 and
R3/R4 must be connected between the COUT and
ground.
4. Keep the switching node, SW1 and SW2, away from
the sensitive FB1 and FB2 node.
5. For good thermal coupling, PCB vias are required
from the Pad for the TDFN paddle to the ground
plane.
Figure 4. Setting the EUP3402 Output Voltage
DS3402 Ver1.0 Mar. 2012
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet EUP3402.PDF ] | |
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