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PDF LTC5800-WHM Data sheet ( Hoja de datos )
| Número de pieza | LTC5800-WHM | |
| Descripción | SmartMesh WirelessHART Node Wireless Mote | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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1. LTC5800-WHM  Hay una vista previa y un enlace de descarga de LTC5800-WHM (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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LTC5800-WHM
SmartMesh WirelessHART Node
Wireless Mote
Network Features
n Complete Radio Transceiver, Embedded Processor,
and Networking Software for Forming a Self-Healing
Mesh Network
n Compliant to WirelessHART (IEC62591) Standard
n SmartMesh® Networks Incorporate:
n Time Synchronized Network-Wide Scheduling
n Per Transmission Frequency Hopping
n Redundant Spatially Diverse Topologies
n Network-Wide Reliability and Power Optimization
n NIST Certified Security
n SmartMesh Networks Deliver:
n >99.999% Network Reliability Achieved in the
Most Challenging Dynamic RF Environments Often
Found in Industrial Applications
n Sub 50µA Routing Nodes
LTC5800-WHM Features
n Industry-Leading Low Power Radio Technology with:
n 4.5mA to Receive a Packet
n 5.4mA to Transmit at 0dBm
n 9.7mA to Transmit at 8dBm
n PCB Module Versions Available (LTP™5901/LTP5902-
WHM) with RF Modular Certifications
n 2.4GHz, IEEE 802.15.4 System-on-Chip
n 72-Pin 10mm × 10mm QFN Package
Description
SmartMesh WirelessHART wireless sensor networks
are self managing, low power networks built from
wireless nodes called motes. The LTC®5800-WHM is the
WirelessHART Mote-on-Chip™ integrated circuit in the
Eterna®* family of IEEE 802.15.4 System-on-Chip (SoC)
solutions, featuring a highly integrated, low power radio
design by Dust Networks® as well as an ARM Cortex-M3 32-
bit microprocessor running Dust’s embedded SmartMesh
WirelessHART networking software.
The LTC5800-WHM SoC features an on-chip power am-
plifier (PA) and transceiver, requiring only power supply
decoupling, crystals, and antenna with matching circuitry
to create a complete wireless node.
With Dust’s time-synchronized WirelessHART networks all
motes in the network may route, source or terminate data
while providing many years of battery powered operation.
The SmartMesh WirelessHART software provided with
the LTC5800-WHM is fully tested and validated, and is
readily configured via a software Application Program-
ming Interface.
SmartMesh WirelessHART motes deliver a highly flexible
network with proven reliability and low power performance
in an easy-to-integrate platform.
L, LT, LTC, LTM, Linear Technology, the Linear logo, Dust, Dust Networks, SmartMesh and
Eterna are registered trademarks and LTP, the Dust Networks logo and Mote-on-Chip are
trademarks of Linear Technology Corporation. All other trademarks are the property of their
respective owners. Protected by U.S. Patents, including 7375594, 7420980, 7529217, 7791419,
7881239, 7898322, 8222965.
* Eterna is Dust Networks’ low power radio SoC architecture.
Typical Application
SENSOR
EXPANDED VIEW
20MHz
LTC5800-WHM
ANTENNA
IN+
LTC2379-18 SPI
IN–
µCONTROLLER
UART
MOTE
32kHz
For more information www.linear.com/LTC5800-WHM
MANAGER
LTP5903-WHR
ANTENNA
UART
ETHERNET
HOST
APPLICATION
5800WHM TA01
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1
1 page  
LTC5800-WHM
R ecommended Operating Conditions The l denotes the specifications which apply over
the full operating temperature range, otherwise specifications are at TA = 25°C and VSUPPLY = 3.6V unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX UNITS
VSUPPLY Supply Voltage
Including Noise and Load Regulation
l 2.1
3.76 V
Supply Noise
Requires Recommended RLC Filter, 50Hz to 2MHz
l
250 mV
Operating Relative Humidity
Non-condensing
l 10
90 % RH
Temperature Ramp Rate While Operating
in Network
l –8
+8 °C/min
DC Characteristics The l denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at TA = 25°C and VSUPPLY = 3.6V unless otherwise noted.
OPERATION/STATE
CONDITIONS
MIN TYP MAX
UNITS
Reset
After Power-on Reset
1.2 µA
Power-on Reset
During Power-on Reset, Maximum 750µs + VSUPPLY Rise Time
from 1V to 1.9V
12
mA
Doze
RAM On, ARM Cortex-M3, Flash, Radio, and Peripherals Off,
1.2 µA
All Data and State Retained, 32.768kHz Reference Active
Deep Sleep
RAM On, ARM Cortex-M3, Flash, Radio, and Peripherals Off,
All Data and State Retained, 32.768kHz Reference Inactive
0.8 µA
In-Circuit Programming
RESETn and FLASH_P_ENn Asserted, IPCS_SCK at 8MHz
20 mA
Peak Operating Current
+8dBm
+0dBm
System Operating at 14.7MHz, Radio Transmitting, During Flash
Write. Maximum duration 4.33 ms.
30
26
mA
mA
Active
ARM Cortex M3, RAM and Flash Operating, Radio and All Other
Peripherals Off. Clock Frequency of CPU and Peripherals Set to
7.3728MHz, VCORE = 1.2V
1.3
mA
Flash Write
Single Bank Flash Write
3.7 mA
Flash Erase
Single Bank Page or Mass Erase
2.5 mA
Radio Tx
+0dBm
+8dBm
Current With Autonomous MAC Managing Radio Operation,
CPU Inactive. Clock Frequency of CPU and Peripherals Set to
7.3728MHz.
5.4 mA
9.7 mA
Radio Rx
Current With Autonomous MAC Managing Radio Operation,
CPU Inactive. Clock Frequency of CPU and Peripherals Set to
7.3728MHz.
4.5 mA
Radio Specifications The l denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at TA = 25°C and VSUPPLY = 3.6V unless otherwise noted.
PARAMETER
CONDITIONS
MIN TYP MAX
UNITS
Frequency Band
l 2.4000
2.4835
GHz
Number of Channels
l 15
Channel Separation
l5
MHz
Channel Center Frequency
Where k = 11 to 25, as Defined by IEEE.802.4.15
l 2405 + 5•(k-11)
MHz
Raw Data Rate
l 250
kbps
Antenna Pin ESD Protection
HBM Per JEDEC JESD22-A114F
±1000
V
Range (Note 4)
25°C, 50% RH, +2dBi Omni-Directional Antenna, Antenna 2m
Indoor
Above Ground
100 m
Outdoor
300 m
Free Space
1200 m
For more information www.linear.com/LTC5800-WHM
5800whmf
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5 Page 
LTC5800-WHM
F lash AC Characteristics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C and VSUPPLY = 3.6V unless otherwise noted. (Note 13)
SYMBOL
PARAMETER
CONDITIONS
MIN TYP MAX
tWRITE
tPAGE_ERASE
tMASS_ERASE
Time to Write a 32-Bit Word (Note 12)
Time to Erase a 2kB Page (Note 12)
Time to Erase 256kB Flash Bank (Note 12)
Data Retention
25°C
85°C
105°C
l
l
l
100
20
8
21
21
21
UNITS
µs
ms
ms
Years
Years
Years
F lash SPI Slave AC Characteristics The l denotes the specifications which apply over the full
operating temperature range, otherwise specifications are at TA = 25°C and VSUPPLY = 3.6V unless otherwise noted. (Note 13)
SYMBOL
PARAMETER
CONDITIONS
MIN TYP MAX
UNITS
tFP_EN_to_RESET
Setup from Assertion of FLASH_P_ENn to
Assertion of RESETn
l0
ns
tFP_ENTER
Delay from the Assertion RESETn to the
First Falling Edge of IPCS_SSn
l 125
µs
tFP_EXIT
Delay from the Completion of the Last
Flash SPI Slave Transaction to the
Negation of RESETn and FLASH_P_ENn
(Note 13)
l 10
µs
tSSS IPCS_SSn Setup to the Leading Edge of
IPCS_SCK
l 15
ns
tSSH IPCS_SSn Hold from Trailing Edge of
IPCS_SCK
l 15
ns
tCK IPCS_SCK Period
tDIS IPCS_MOSI Data Setup
tDIH IPCS_MOSI Data Hold
tDOV IPCS_MISO Data Valid
tOFF IPCS_MISO Data Tri-State
l 50
l 15
l5
l3
l0
ns
ns
ns
ns
30 ns
FLASH_P_ENn
RESETn
IPCS_SSn
IPCS_SCK
IPCS_MOSI
tFP_EN_TO_RESET
tFP_ENTER
tSSS
tCK
tFP_EXIT
tSSH
tDIS
tDIH
Figure 4. Flash Programming Interface Timing
5800WHM F04
For more information www.linear.com/LTC5800-WHM
5800whmf
11
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| PDF Descargar | [ Datasheet LTC5800-WHM.PDF ] | |
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