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PDF MAX19706ETM Data sheet ( Hoja de datos )

Número de pieza MAX19706ETM
Descripción Ultra-Low-Power Analog Front-End
Fabricantes Maxim Integrated 
Logotipo Maxim Integrated Logotipo



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19-3867; Rev 0; 10/05
EVAALVUAAILTAIOBNLEKIT
10-Bit, 22Msps, Ultra-Low-Power
Analog Front-End
General Description
Features
The MAX19706 is an ultra-low-power, mixed-signal ana-
log front-end (AFE) designed for power-sensitive com-
munication equipment. Optimized for high dynamic
performance at ultra-low power, the device integrates a
dual, 10-bit, 22Msps receive (Rx) ADC; dual, 10-bit,
22Msps transmit (Tx) DAC; three fast-settling 12-bit aux-
DAC channels for ancillary RF front-end control; and a
10-bit, 333ksps housekeeping aux-ADC. The typical
operating power in Tx-Rx FAST mode is 49.5mW at a
22MHz clock frequency.
The Rx ADCs feature 54.6dB SNR and 75.6dBc SFDR at
a 5.5MHz input frequency with a 22MHz clock frequen-
cy. The analog I/Q input amplifiers are fully differential
and accept 1.024VP-P full-scale signals. Typical I/Q
channel matching is ±0.12° phase and ±0.01dB gain.
The Tx DACs feature 72.6dBc SFDR at fOUT = 2.2MHz
and fCLK = 22MHz. The analog I/Q full-scale output volt-
age is ±400mV differential. The Tx DAC common-mode
DC level is programmable from 0.9V to 1.35V. The I/Q
channel offset is adjustable. The typical I/Q channel
matching is ±0.02dB gain and ±0.1° phase.
The Rx ADC and Tx DAC share a single, 10-bit parallel,
high-speed digital bus allowing half-duplex operation for
time-division duplex (TDD) applications. A 3-wire serial
interface controls power-management modes, the aux-
DAC channels, and the aux-ADC channels.
The MAX19706 operates on a single +2.7V to +3.3V ana-
log supply and +1.8V to +3.3V digital I/O supply. The
MAX19706 is specified for the extended (-40°C to +85°C)
temperature range and is available in a 48-pin, thin QFN
package. The Selector Guide at the end of the data sheet
lists other pin-compatible versions in this AFE family.
Dual, 10-Bit, 22Msps Rx ADC and Dual, 10-Bit,
22Msps Tx DAC
Ultra-Low Power
49.5mW at fCLK = 22MHz, Fast Mode
39.3mW at fCLK = 22MHz, Slow Mode
Low-Current Standby and Shutdown Modes
Programmable Tx DAC Common-Mode DC Level
and I/Q Offset Trim
Excellent Dynamic Performance
SNR = 54.6dB at fIN = 5.5MHz (Rx ADC)
SFDR = 72.6dBc at fOUT = 2.2MHz (Tx DAC)
Three 12-Bit, 1µs Aux-DACs
10-Bit, 333ksps Aux-ADC with 4:1 Input Mux and
Data Averaging Mode
Excellent Gain/Phase Match
±0.12° Phase, ±0.01dB Gain (Rx ADC) at
fIN = 5.5MHz
Multiplexed Parallel Digital I/O
Serial-Interface Control
Versatile Power-Control Circuits
Shutdown, Standby, Idle, Tx/Rx Disable
Miniature 48-Pin Thin QFN Package
(7mm x 7mm x 0.8mm)
Pin Configuration
TOP VIEW
36 35 34 33 32 31 30 29 28 27 26 25
Applications
WiMAX(SM) and Wi-Bro CPEs
802.11a/b/g WLAN
VoIP Terminals
Portable Communication Equipment
WiMAX is a service mark of Bandwidth.com, Inc.
Ordering Information
PART*
MAX19706ETM
PIN-PACKAGE
48 Thin QFN-EP**
PKG CODE
T4877-4
DAC2
DAC1
VDD
IDN
IDP
GND
VDD
QDN
QDP
REFIN
COM
REFN
37
38
39
40
41
42
43
44
45
46
47
48
MAX19706
EXPOSED PADDLE (GND)
24 D9
23 D8
22 D7
21 D6
20 OVDD
19 OGND
18 D5
17 D4
16 D3
15 D2
14 D1
13 D0
1 2 3 4 5 6 7 8 9 10 11 12
MAX19706ETM+ 48 Thin QFN-EP**
T4877-4
*All devices are specified over the -40°C to +85°C operating
range.
**EP = Exposed paddle.
+Denotes lead-free package.
THIN QFN
Functional Diagram and Selector Guide appear at end of
data sheet.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

1 page




MAX19706ETM pdf
10-Bit, 22Msps, Ultra-Low-Power
Analog Front-End
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 3V, OVDD = 1.8V, internal reference (1.024V), CL 10pF on all digital outputs, fCLK = 22MHz (50% duty cycle), Rx ADC input
amplitude = -0.5dBFS, Tx DAC output amplitude = 0dBFS, differential Rx ADC input, differential Tx DAC output, CREFP = CREFN =
CCOM = 0.33µF, unless otherwise noted. CL < 5pF on all aux-DAC outputs. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Tx DAC DC ACCURACY
Resolution
N
10 Bits
Integral Nonlinearity
INL
±0.39
LSB
Differential Nonlinearity
DNL Guaranteed monotonic (Note 6)
-1
±0.2
+1
LSB
Residual DC Offset
VOS
Full-Scale Gain Error
Tx DAC DYNAMIC PERFORMANCE
TA > +25°C
TA < +25°C
Include reference error
(peak-to-peak error)
TA > +25°C
TA < +25°C
-4 ±1 +4
mV
-5 ±1 +5
-30 +30
mV
-40 +40
DAC Conversion Rate
In-Band Noise Density
fCLK
ND
(Note 2)
fOUT = 2.2MHz, fCLK = 22MHz
22 MHz
-130.1
dBc/Hz
Third-Order Intermodulation
Distortion
IM3 f1 = 2MHz, f2 = 2.2MHz
84 dBc
Glitch Impulse
10 pVs
Spurious-Free Dynamic Range to
Nyquist
SFDR fCLK = 22MHz, fOUT = 2.2MHz
61 72.6
dBc
Total Harmonic Distortion to
Nyquist
THD
fCLK = 22MHz, fOUT = 2.2MHz
-70.2 -60
dB
Signal-to-Noise Ratio to Nyquist
SNR
fCLK = 22MHz, fOUT = 2.2MHz
Tx DAC INTERCHANNEL CHARACTERISTICS
I-to-Q Output Isolation
Gain Mismatch Between DAC
Outputs
fOUTX,Y = 2MHz, fOUTX,Y = 2.2MHz
Measured at DC
TA > +25°C
TA < +25°C
Phase Mismatch Between DAC
Outputs
fOUT = 2.2MHz, fCLK = 45MHz
Differential Output Impedance
Tx DAC ANALOG OUTPUT
Full-Scale Output Voltage
VFS
Bits CM1 = 0, CM0 = 0 (default)
Output Common-Mode Voltage
VCOM
Bits CM1 = 0, CM0 = 1
Bits CM1 = 1, CM0 = 0
Bits CM1 = 1, CM0 = 1
59.7 dB
-0.3
-0.38
90
±0.02
+0.3
+0.38
dB
dB
±0.1
Degrees
800
±400
1.29 1.35 1.41
1.2
1.05
0.9
mV
V
_______________________________________________________________________________________ 5

5 Page





MAX19706ETM arduino
10-Bit, 22Msps, Ultra-Low-Power
Analog Front-End
Typical Operating Characteristics (continued)
(VDD = 3V, OVDD = 1.8V, internal reference (1.024V), CL 10pF on all digital outputs, fCLK = 22MHz (50% duty cycle), Rx ADC input
amplitude = -0.5dBFS, Tx DAC output amplitude = 0dBFS, differential Rx ADC input, differential Tx DAC output, CREFP = CREFN =
CCOM = 0.33µF, TA = +25°C, unless otherwise noted.)
Rx ADC SIGNAL-TO-NOISE RATIO
vs. SAMPLING RATE
56.0
fIN = 5.468363MHz
55.5 QA
Rx ADC SIGNAL-TO-NOISE AND DISTORTION
RATIO vs. SAMPLING RATE
56.0
fIN = 5.468363MHz
55.5
QA
Rx ADC TOTAL HARMONIC DISTORTION
vs. SAMPLING RATE
-70
-71 fIN = 5.468363MHz
-72
55.0
54.5 IA
55.0
54.5
-73
-74 IA
IA -75
-76
54.0 54.0 -77 QA
53.5
53.0
1.5 4.0 6.5 9.0 11.5 14.0 16.5 19.0 21.5
SAMPLING RATE (MHz)
53.5
53.0
1.5 4.0 6.5 9.0 11.5 14.0 16.5 19.0 21.5
SAMPLING RATE (MHz)
-78
-79
-80
1.5 4.0 6.5 9.0 11.5 14.0 16.5 19.0 21.5
SAMPLING RATE (MHz)
Rx ADC SPURIOUS-FREE DYNAMIC RANGE
vs. SAMPLING RATE
85
84
83
fIN = 5.468363MHz
82
81 QA
80
79
78
77
76 IA
75
74
73
72
71
70
1.5 4.0 6.5 9.0 11.5 14.0 16.5 19.0 21.5
SAMPLING RATE (MHz)
Rx ADC SIGNAL-TO-NOISE RATIO
vs. CLOCK DUTY CYCLE
56.0
55.5 fIN = 5.468363MHz
55.0
QA
54.5
54.0 IA
53.5
53.0
52.5
52.0
51.5
51.0
50.5
50.0
35 40 45 50 55 60
CLOCK DUTY CYCLE (%)
65
Rx ADC SIGNAL-TO-NOISE AND DISTORTION
RATIO vs. CLOCK DUTY CYCLE
56.0
55.5 fIN = 5.468363MHz
55.0
54.5
54.0 IA
53.5
QA
53.0
52.5
52.0
51.5
51.0
50.5
50.0
35 40 45 50 55 60 65
CLOCK DUTY CYCLE (%)
Rx ADC TOTAL HARMONIC DISTORTION
vs. CLOCK DUTY CYCLE
-70
-71 fIN = 5.468363MHz
-72 IA
-73
-74
-75
-76
-77 QA
-78
-79
-80
-81
-82
-83
-84
-85
35 40 45 50 55 60 65
CLOCK DUTY CYCLE (%)
Rx ADC SPURIOUS-FREE DYNAMIC RANGE
vs. CLOCK DUTY CYCLE
85
84
83
fIN = 5.468363MHz
82
81
80
79
78
77
76
75
74 IA
QA
73
72
71
70
35 40 45 50 55 60 65
CLOCK DUTY CYCLE (%)
Rx ADC OFFSET ERROR
vs. TEMPERATURE
0
-0.2 IA
-0.4
-0.6
-0.8
-1.0
-1.2
-1.4
-1.6 QA
-1.8
-2.0
-40 -25 -10 5 20 35 50 65 80
TEMPERATURE (°C)
______________________________________________________________________________________ 11

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