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PDF MAX19705 Data sheet ( Hoja de datos )
| Número de pieza | MAX19705 | |
| Descripción | Ultra-Low-Power Analog Front-End | |
| Fabricantes | Maxim Integrated | |
| Logotipo |  |
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19-3763; Rev 0; 8/05
EVAALVUAAILTAIOBNLEKIT
10-Bit, 7.5Msps, Ultra-Low-Power
Analog Front-End
General Description
The MAX19705 is an ultra-low-power, mixed-signal ana-
log front-end (AFE) designed for power-sensitive com-
munication equipment. Optimized for high dynamic
performance at ultra-low power, the device integrates a
dual 10-bit, 7.5Msps receive (Rx) ADC; dual 10-bit,
7.5Msps transmit (Tx) DAC; three fast-settling 12-bit
aux-DAC channels for ancillary RF front-end control;
and a 10-bit, 333ksps housekeeping aux-ADC. The typ-
ical operating power in Tx-Rx FAST mode is 28.2mW at
a 7.5MHz clock frequency.
The Rx ADCs feature 55.1dB SNR and 73.4dBc SFDR at
a 1.875MHz input frequency with a 7.5MHz clock fre-
quency. The analog I/Q input amplifiers are fully differen-
tial and accept 1.024VP-P full-scale signals. Typical I/Q
channel matching is ±0.01° phase and ±0.02dB gain.
The Tx DACs feature 77.2dBc SFDR at fOUT = 620kHz
and fCLK = 7.5MHz. The analog I/Q full-scale output
voltage is ±400mV differential. The Tx DAC common-
mode DC level is programmable from 0.9V to 1.35V.
The I/Q channel offset is adjustable. The typical I/Q
channel matching is ±0.03dB gain and ±0.08° phase.
The Rx ADC and Tx DAC share a single, 10-bit parallel,
high-speed digital bus allowing half-duplex operation
for time-division duplex (TDD) applications. A 3-wire
serial interface controls power-management modes, the
aux-DAC channels, and the aux-ADC channels.
The MAX19705 operates on a single +2.7V to +3.3V
analog supply and +1.8V to +3.3V digital I/O supply.
The MAX19705 is specified for the extended (-40°C to
+85°C) temperature range and is available in a 48-pin,
thin QFN package. The Selector Guide at the end of the
data sheet lists other pin-compatible versions in this
AFE family.
Applications
Broadband Access Radio
Private Mobile Radio (PMR)
Portable Communication Equipment
Ordering Information
PART*
PIN-PACKAGE
PKG CODE
MAX19705ETM
48 Thin QFN-EP**
T4877-4
MAX19705ETM+ 48 Thin QFN-EP**
T4877-4
*All devices are specified over the -40°C to +85°C operating
range.
**EP = Exposed paddle.
+Denotes lead-free package.
Features
♦ Dual 10-Bit, 7.5Msps Rx ADC and Dual 10-Bit,
7.5Msps Tx DAC
♦ Ultra-Low Power
28.2mW at fCLK = 7.5MHz, Fast Mode
21mW at fCLK = 7.5MHz, Slow Mode
Low-Current Standby and Shutdown Modes
♦ Programmable Tx DAC Common-Mode DC Level
and I/Q Offset Trim
♦ Excellent Dynamic Performance
SNR = 55.1dB at fIN = 1.875MHz (Rx ADC)
SFDR = 77.2dBc at fOUT = 620kHz (Tx DAC)
♦ Three 12-Bit, 1µs Aux-DACs
♦ 10-Bit, 333ksps Aux-ADC with 4:1 Input Mux and
Data Averaging
♦ Excellent Gain/Phase Match
±0.01° Phase, ±0.02dB Gain (Rx ADC) at
fIN = 1.875MHz
♦ Multiplexed Parallel Digital I/O
♦ Serial-Interface Control
♦ Versatile Power-Control Circuits
Shutdown, Standby, Idle, Tx/Rx Disable
♦ Miniature 48-Pin Thin QFN Package
(7mm x 7mm x 0.8mm)
Pin Configuration
TOP VIEW
36 35 34 33 32 31 30 29 28 27 26 25
DAC2
DAC1
VDD
IDN
IDP
GND
VDD
QDN
QDP
REFIN
COM
REFN
37
38
39
40
41
42
43
44
45
46
47
48
MAX19705
EXPOSED PADDLE (GND)
1 2 3 4 5 6 7 8 9 10 11 12
24 D9
23 D8
22 D7
21 D6
20 OVDD
19 OGND
18 D5
17 D4
16 D3
15 D2
14 D1
13 D0
Functional Diagram and Selector Guide appear at end of
data sheet.
THIN QFN
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1 page  
10-Bit, 7.5Msps, Ultra-Low-Power
Analog Front-End
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 3V, OVDD = 1.8V, internal reference (1.024V), CL ≈ 10pF on all digital outputs, fCLK = 7.5MHz (50% duty cycle), Rx ADC input
amplitude = -0.5dBFS, Tx DAC output amplitude = 0dBFS, differential Rx ADC input, differential Tx DAC output, CREFP = CREFN =
CCOM = 0.33µF, unless otherwise noted. CL < 5pF on all aux-DAC outputs. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
Tx DAC DC ACCURACY
Resolution
Integral Nonlinearity
Differential Nonlinearity
SYMBOL
CONDITIONS
N
INL
DNL
Guaranteed monotonic (Note 2)
MIN TYP MAX UNITS
10
±0.35
-1 ±0.25 +1
Bits
LSB
LSB
Residual DC Offset
Full-Scale Gain Error
Tx DAC DYNAMIC PERFORMANCE
DAC Conversion Rate
In-Band Noise Density
Third-Order Intermodulation
Distortion
Glitch Impulse
VOS
fCLK
ND
IM3
-4 ±0.06 +4
Include reference error (peak-to-peak error) -55
+55
mV
mV
(Note 3)
fOUT = 620kHz, fCLK = 7.5MHz
f1 = 620kHz, f2 = 640kHz
-127
78
10
7.5 MHz
dBc/Hz
dBc
pV•s
Spurious-Free Dynamic Range to
Nyquist
SFDR fCLK = 7.5MHz, fOUT = 620kHz
59 77.2
dBc
Total Harmonic Distortion to
Nyquist
THD
fCLK = 7.5MHz, fOUT = 620kHz
-76.1 -59.5
dB
Signal-to-Noise Ratio to Nyquist
SNR
Tx DAC INTERCHANNEL CHARACTERISTICS
I-to-Q Output Isolation
Gain Mismatch Between DAC
Outputs
fCLK = 7.5MHz, fOUT = 620kHz
fOUTX,Y = 500kHz, fOUTX,Y = 620kHz
Measured at DC
61
90
-0.4 ±0.03 +0.4
dB
dB
dB
Phase Mismatch Between DAC
Outputs
Differential Output Impedance
Tx DAC ANALOG OUTPUT
Full-Scale Output Voltage
Output Common-Mode Voltage
fOUT = 620kHz, fCLK = 7.5MHz
VFS
VCOM
Bits CM1 = 0, CM0 = 0 (default)
Bits CM1 = 0, CM0 = 1
Bits CM1 = 1, CM0 = 0
Bits CM1 = 1, CM0 = 1
±0.08
800
Degrees
Ω
±400
1.30 1.35 1.48
1.2
1.05
0.9
mV
V
_______________________________________________________________________________________ 5
5 Page 
10-Bit, 7.5Msps, Ultra-Low-Power
Analog Front-End
Typical Operating Characteristics (continued)
(VDD = 3V, OVDD = 1.8V, internal reference (1.024V), CL ≈ 10pF on all digital outputs, fCLK = 7.5MHz (50% duty cycle), Rx ADC input
amplitude = -0.5dBFS, Tx DAC output amplitude = 0dBFS, differential Rx ADC input, differential Tx DAC output, CREFP = CREFN =
CCOM = 0.33µF, TA = +25°C, unless otherwise noted.)
Rx ADC SIGNAL-TO-NOISE AND DISTORTION
RATIO vs. SAMPLING RATE
57
fIN = 1.8063354MHz
56
IA
55
Rx ADC SPURIOUS-FREE DYNAMIC RANGE
vs. SAMPLING RATE
90
fIN = 1.8063354MHz
85
QA
80
Rx ADC SIGNAL-TO-NOISE RATIO
vs. CLOCK DUTY CYCLE
57
fIN = 1.8063354MHz
56
IA
55
54
75
53 QA
IA
54
QA
52 70 53
51
1.5
2.5 3.5 4.5 5.5 6.5
SAMPLING RATE (MHz)
7.5
Rx ADC SIGNAL-TO-NOISE AND DISTORTION
RATIO vs. CLOCK DUTY CYCLE
57
fIN = 1.8063354MHz
56
QA
55
54
IA
53
65
1.5
2.5 3.5 4.5 5.5 6.5
SAMPLING RATE (MHz)
7.5
Rx ADC SPURIOUS-FREE DYNAMIC RANGE
vs. CLOCK DUTY CYCLE
90
fIN = 1.8063354MHz
85
IA
80
75
QA
70
65
52
35
1.2
1.0
0.8
0.6
0.4
0.2
45 55
CLOCK DUTY CYCLE (%)
Rx ADC OFFSET ERROR
vs. TEMPERATURE
65
52
35
45 55
CLOCK DUTY CYCLE (%)
65
60
35
45 55
CLOCK DUTY CYCLE (%)
65
0
-40 -20
0 20 40 60
TEMPERATURE (°C)
80
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
-40
Rx ADC GAIN ERROR
vs. TEMPERATURE
-20 0 20 40 60
TEMPERATURE (°C)
80
Tx DAC SPURIOUS-FREE DYNAMIC
RANGE vs. SAMPLING RATE
80
fOUT = fCLK / 10
78
76
74
72
70
1.5
2.5 3.5 4.5 5.5 6.5
SAMPLING RATE (MHz)
7.5
Tx DAC SPURIOUS-FREE DYNAMIC
RANGE vs. OUTPUT FREQUENCY
80
78
76
74
72
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5
OUTPUT FREQUENCY (MHz)
______________________________________________________________________________________ 11
11 Page | ||
| Páginas | Total 37 Páginas | |
| PDF Descargar | [ Datasheet MAX19705.PDF ] | |
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