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PDF HD74ALVCH162260 Data sheet ( Hoja de datos )
| Número de pieza | HD74ALVCH162260 | |
| Descripción | 12-bit to 24-bit Multiplexed D-type Latches with 3-state Outputs | |
| Fabricantes | Hitachi Semiconductor | |
| Logotipo |  |
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HD74ALVCH162260
12-bit to 24-bit Multiplexed D-type Latches with 3-state Outputs
ADE-205-177B (Z)
3rd. Edition
December 1999
Description
The HD74ALVCH162260 is a 12-bit to 24-bit multiplexed D-type latch used in applications where two
separate data paths must be multiplexed onto, or demultiplexed from, a single data path. Typical
applications include multiplexing and / or demultiplexing of address and data information in
microprocessor or bus interface applications. This device is also useful in memory interleaving
applications. Three 12-bit I / O ports (A1-A12, 1B1-1B12, and 2B1-2B12) are available for address and /
or data transfer. The output enable (OE1B, OE2B, and OEA) inputs control the bus transceiver functions.
The OE1B and OE2B control signals also allow bank control in the A-to-B direction. Address and / or data
information can be stored using the internal storage latches. The latch enable (LE1B, LE2B, LEA1B, and
LEA2B) inputs are used to control data storage. When the latch enable input is high, the latch is
transparent. When the latch enable input goes low, the data present at the inputs is latched and remains
latched until the latch enable input is returned high. Active bus hold circuitry is provided to hold unused or
floating data inputs at a valid logic level. The B outputs, which are designed to sink up to 12 mA, include
26 Ω resistors to reduce overshoot and undershoot.
Features
• VCC = 2.3 V to 3.6 V
• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
• Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
• High output current ±12 mA (@VCC = 3.0 V)
• Bus hold on data inputs eliminates the need for external pullup / pulldown resistors
• B-port outputs have equivalent 26 Ω series resistors, so no external resistors are required.
1 page  
HD74ALVCH162260
Recommended Operating Conditions
Item
Symbol
Min
Max Unit Conditions
Supply voltage
Input voltage
Output voltage
High level output current
VCC
VI
VO
IOH (A port)
IOH (B port)
Low level output current
IOL (A port)
IOL (B port)
Input transition rise or fall rate ∆t / ∆v
2.3
0
0
—
—
—
—
—
—
—
—
—
—
—
—
0
3.6 V
VCC V
VCC V
–12 mA VCC = 2.3 V
–12 VCC = 2.7 V
–24 VCC = 3.0 V
–6 mA VCC = 2.3 V
–8 VCC = 2.7 V
–12 VCC = 3.0 V
12 mA VCC = 2.3 V
12 VCC = 2.7 V
24 VCC = 3.0 V
6 mA VCC = 2.3 V
8 VCC = 2.7 V
12 VCC = 3.0 V
10 ns / V
Operating temperature
Ta
–40 85
°C
Note: Unused control inputs must be held high or low to prevent them from floating.
5
5 Page 
• Test Circuit
HD74ALVCH162260
500 Ω
*1
CL= 50 pF
500 Ω
See under table
S1
OPEN
GND
Load Circuit for Outputs
Symbol Vcc=2.5±0.2V
tPLH / t PHL
tsu / t h / t w
OPEN
tZH/ t HZ
tZL / t LZ
GND
4.6 V
Vcc=2.7V,
3.3±0.3V
OPEN
GND
6.0 V
Note: 1. CL includes probe and jig capacitance.
11
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet HD74ALVCH162260.PDF ] | |
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