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PDF HMC624ALP4E Data sheet ( Hoja de datos )
| Número de pieza | HMC624ALP4E | |
| Descripción | 0.5 dB LSB GaAs MMIC 6-BIT DIGITAL ATTENUATOR | |
| Fabricantes | Hittite Microwave Corporation | |
| Logotipo |  |
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v00.0912
Typical Applications
The HMC624ALP4E is ideal for:
• Cellular/3G Infrastructure
• WiBro / WiMAX / 4G
• Microwave Radio & VSAT
• Test Equipment and Sensors
• IF & RF Applications
Functional Diagram
HMC624ALP4E
0.5 dB LSB GaAs MMIC 6-BIT
DIGITAL ATTENUATOR, DC - 6 GHz
Features
0.5 dB LSB Steps to 31.5 dB
Power-Up State Selection
High Input IP3: +55 dBm
Low Insertion Loss: 2.2 dB @ 3.5 GHz
TTL/CMOS Compatible, Serial, Parallel
or Latched Parallel Control
±0.25 dB Typical Step Error
Single +3V or +5V Supply
24 Lead 4x4mm SMT Package: 16mm2
General Description
The HMC624ALP4E is a broadband 6-bit GaAs IC
Digital Attenuator in a low cost leadless SMT package.
This versatile digital attenuator incorporates off-chip
AC ground capacitors for near DC operation, making
it suitable for a wide variety of RF and IF applications.
The dual mode control interface is CMOS/TTL
compatible, and accepts either a three wire serial
input or a 6 bit parallel word. The HMC624ALP4E also
features a user selectable power up state and a serial
output port for cascading other Hittite serial controlled
components. The HMC624ALP4E is housed in a
RoHS compliant 4x4 mm QFN leadless package, and
requires no external matching components.
Electrical Specifications,
TA = +25° C, 50 Ohm System, with Vdd = +5V & Vctl = 0/+5V (Unless Otherwise Noted)
Parameter
Frequency (GHz)
Min.
Typ.
Max.
Insertion Loss
DC - 3 GHz
3.0 - 6.0 GHz
1.5 2.4
2.3 3.8
Attenuation Range
31.5
Return Loss (ATTIN, ATTOUT, All Atten. States)
DC - 6 GHz
15
Attenuation Accuracy: (Referenced to Insertion Loss)
All Attenuation States
DC - 0.8 GHz
0.8 - 6.0 GHz
± (0.10 + 5% of Atten. Setting) Max.
± (0.30 + 3% of Atten. Setting) Max.
Input Power for 0.1 dB Compression
DC - 6 GHz
30
Input Third Order Intercept Point
(Two-Tone Input Power = 10 dBm Each Tone)
DC - 6 GHz
55
Switching Speed
tRise, tFall (10 / 90% RF)
rON , tOFF (50% LE to 10 / 90% RF)
DC - 6 GHz
60
90
Units
dB
dB
dB
dB
dB
dB
dBm
dBm
ns
ns
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824
1 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com
http://www.Datasheet4U.com
Application Support: Phone: 978-250-3343 or [email protected]
1 page  
v00.0912
HMC624ALP4E
0.5 dB LSB GaAs MMIC 6-BIT
DIGITAL ATTENUATOR, DC - 6 GHz
Timing Diagram (Latched Parallel Mode)
Parallel Mode
(Direct Parallel Mode & Latched Parallel Mode)
Note: The parallel mode is enabled when P/S is set to low.
Parameter
Min. serial period, tSCK
Control set-up time, tCS
Control hold-time, tCH
LE setup-time, tLN
Min. LE pulse width, tLEW
Min LE pulse spacing, tLES
Serial clock hold-time from LE, tCKN
Hold Time, tPH.
Latch Enable Minimum Width, tLEN
Setup Time, tPS
Min. [1]
70 ns
15 ns
15 ns
Typ. [1]
20 ns
10 ns
630 ns
10 ns
0 ns
10 ns
2 ns
Direct Parallel Mode - The attenuation state is changed by the control voltage inputs D0-D5 directly. The LE (Latch
Enable) must be at a logic high at all times to control the attenuator in this manner.
Latched Parallel Mode - The attenuation state is selected using the control voltage inputs D0-D5 and set while the
LE is in the Low state. The attenuator will not change state while LE is Low. Once all Control Voltage Inputs are at the
desired states the LE is pulsed. See timing diagram above for reference.
Power-Up States
If LE is set to logic LOW at power-up, the logic state of
PUP1 and PUP2 determines the power-up state of the
part per PUP truth table. If the LE is set to logic HIGH
at power-up, the logic state of D0-D5 determines the
power-up state of the part per truth table. The attenu-
ator latches in the desired power-up state approxi-
mately 200 ms after power-up.
Power-On Sequence
The ideal power-up sequence is: GND, Vdd, digital
inputs, RF inputs. The relative order of the digital
inputs are not important as long as they are powered
after Vdd / GND
Bias Voltage
Vdd (V)
3
5
Control Voltage Table
Idd (Typ.) (mA)
2.4
2.6
State
Low
High
Vdd = +3V
0 to 0.5V @ 15 µA
2 to 3V @ 45 µA
Vdd = +5V
0 to 0.8V @ 15 µA
2 to 5V @ 65 µA
[1] Vdd = 5V
PUP Truth Table
LE
PUP1
PUP2
000
010
001
011
1XX
Relative Attenuation
-31.5
-24
-16
Insertion Loss
0 to -31.5 dB
Note: The logic state of D0 - D5 determines the power-
up state per truth table shown below when LE is high
at power-up.
Truth Table
Control Voltage Input
Reference
Insertion
D5 D4 D3 D2 D1 D0
Loss
High High High High High High
0 dB
High High High High High Low
-0.5 dB
High High High High Low High
-1 dB
High High High Low High High
-2 dB
High High Low High High High
-4 dB
High Low High High High High
-8 dB
Low High High High High High
-16 dB
Low Low Low Low Low Low
-31.5 dB
Any combination of the above states will provide an attenuation
equal to the sum of the bits selected.
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824
5
Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or [email protected]
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet HMC624ALP4E.PDF ] | |
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