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PDF NB675 Data sheet ( Hoja de datos )
| Número de pieza | NB675 | |
| Descripción | 24V High Current Synchronous Buck Converter | |
| Fabricantes | MPS | |
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The Future of Analog IC Technology
NB675
24V, High Current
Synchronous Buck Converter
With +/-1.5A LDO and Buffed Reference
DESCRIPTION
The NB675 provides a complete power supply
for DDR3, DDR3L and LPDD R2 memory with
the highest power density. It integrates a high
frequency synchronous rectified step-down
switch mod e converter (VDDQ) with an 1.5A
sink/source LDO (VTT) and buffere d low noise
reference (VTTREF).
The fully integrated Buck converter is able to
deliver 10A continuous output current and 12A
peak output current over a wide input supply
range with excellent lo ad and line regulation.
The Buck converter employs the Constant-On-
Time (COT ) control scheme, which provides
fast transient respon se and eases loop
stabilization.
The VTT LDO provi des 1.5A sink/source
current ca pability an d requires only 10u F
ceramic capacitance.
The VTTREF tracks VDDQ/2 with an excellent
1% accuracy.
Under voltage lockout is internally set as 4.5V.
An open drain power good sign al indicate s
VDDQ is within its nominal voltage range.
Full p rotection f eatures include OCP, OVP, a nd
thermal shut down.
This p art r equires min imum numb er of ex ternal
components an d is a vailable in QFN21
(3mmx4mm) package.
FEATURES
• Wide 5V to 24V Operating Input Range
• 10A Continuous Output Current
• 12A Peak Output Current
• Built-in +/- 1.5A VTTLDO
• Low RDS(ON) Internal Power MOSFETs
• Proprietary Switching Loss Reduction
Technique
• Internal Soft Start
• Output Discharge
• 500kHZ Switching Frequency
• OCP, OVP, UVP Protection and Thermal
Shutdown
• VDDQ Adjustable from 0.604V to 5.5V
APPLICATIONS
• Laptop Computer
• Tablet PC
• Networking Systems
• Server
• Personal Video Recorders
• Flat Panel Television and Monitors
• Distributed Power Systems
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Products, Quality Assurance page.
“MPS” and “The Future of Analog IC Technology” are registered trademarks of
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
VIN
5-21V
VIN
BST
SW
EN 1
EN 2
PG
VCC
NB675
FB
VDDQSEN
VINLDO
AGND
VTT
PGND VTTREF VTTSEN
220nF
220nF
VDDQ
1.35V/10A
VTT
0.675V/2A
95
85
75
65
55
45
35
25
15
0.001
0.01 0.1
1
LOAD CURRENT (A)
10
NB675 Rev. 1.0
1/14/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
1
http://www.Datasheet4U.com
1 page  
NB675 –24V, HIGH CURRENT SYNCHRONOUS BUCK CONVERTER
PIN FUNCTIONS
PIN #
Name Description
1 BST
Bootstrap. A cap acitor co nnected bet ween SW a nd BST pins i s re quired to form a
floating supply across the high-side switch driver.
Switch Output. Connect this pin to the inductor and bootstrap capacitor. This pin is
driven up to the VIN voltage by the high-side switch during the on-time of the PWM
2, 3
SW
duty cycle. The inductor current drives the SW pin negative during the off-time. The on-
resistance of the low-side switch and the internal diode fixes the negative voltage. Use
wide and short PCB traces to make the connection. Try to minimize the area of the SW
pattern.
4 VTTREF
Buffered VTT reference output. Decouple with a minimum 0.22μF ceramic capacitor as
close to the pin as possible. X7R or X5R grade dielectric ceramic capacitors are
recommended for their stable temperature characteristics.
5 VDDQSE
N
Buck regul ator output voltage se nse. Con nect th is pin to the o
regulator directly
utput capa citor of the
6 VINLDO VTT LDO regulator input. Connect VINLDO to VDDQ in typical application.
7 VTT
VTT LDO output. Decouple with a minimum 10uF ceramic capacitor as close to the pin
as possible. X7R or X5R grade dielectric ceramic capacitors are recommended for their
stable temperature characteristics.
8 AGND
Analog g round. The intern al referen ce is refe rred to AGND. Connect the G ND of the
FB divider resistor to AGND for better load regulation.
9 VTTSEN VTT output sense. Connect this pin to the output capacitor of the VTT regulator directly
10,11
Exposed
Pad 20,21
PGND Power Ground. Use wide PCB traces and multiple vias to make the connection.
12
Exposed
Pad 19
Supply Voltage. The VIN pin supplies power for internal MOSFET and regulator. The
VIN NB675 operate from a +5V to +22V input rail. An input capacitor is needed to decouple
the input rail. Use wide PCB traces and multiple vias to make the connection.
13 PG
Power good output, the output of this pin is an open drain signal and is high if the
output voltage is higher than 95% of the nominal voltage. There is a delay from FB ≥
95% to PG goes high.
14 FB
Feedback. An external resistor divider from the output to GND, tapped to the FB pin,
sets the output voltage. Place the resistor divider as close to FB pin as possible. Avoid
vias on the FB traces. It is recommend to set the current through FB resistors around
10uA.
15 EN1
Enable. EN1 and EN2 are digital inputs, which are used to enable or disable the
internal regulators. Once EN1=EN2=1, the VDDQ regulator, VTT LDO and VTTREF
output will be turned on; when EN1=0 and EN2=1, the VDDQ regulator and VTTREF
are active while VTT LDO is off; all the regulators will be turned off when EN1=EN2=0.
16 VCC
Internal 5V LDO output. The driver and control circuits are po wered from this voltage.
Decouple with a minim um 1µF ce ramic capacitor as close to the pin as possible. X7R
or X5 R g rade diel ectric ce ramic capacitors are re commended for th eir stable
temperature characteristics.
17 EN2
Enable. EN1 and EN2 are digital inputs, which are used to enable or disable the
internal regulators. Once EN1=EN2=1, the VDDQ regulator, VTT LDO and VTTREF
output will be turned on; when EN1=0 and EN2=1, the VDDQ regulator and VTTREF
are active while VTT LDO is off; all the regulators will be turned off when EN1=EN2=0.
18 NC Not connected.
NB675 Rev. 1.0
1/14/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
5
5 Page 
NB675 –24V, HIGH CURRENT SYNCHRONOUS BUCK CONVERTER
OPERATION
PWM Operation
The NB675 is fully integrated synchrono us
rectified step-down switch mode converter.
Constant-on-time (COT) control is employed t o
provide fast transient r esponse an d easy loo p
stabilization. At the beginning of ea ch cycle, th e
high-side MOSFET (HS-FET) is tur ned ON wh en
the feedback voltage (VFB) is below the reference
voltage (VREF), which in dicates insufficient output
voltage. The ON period is determined by both the
output voltage and input voltage to make the
switching fr equency fairy constant over input
voltage range.
After the ON period elapses, the HS-FET is
turned off, or becomes OFF state. It is turned ON
again when VFB drops below VREF. By repeating
operation th is way, the converter r egulates th e
output voltage. The inte grated low-side MOSFET
(LS-FET) is turned on w hen the HS-FET is in it s
OFF state to minimize the conduction loss. The re
will be a de ad short be tween input and GND i f
both HS-FET and LS-FET are turned on at th e
same time. It’s calle d shoot-through. In order to
avoid shoot-through, a dead-time (DT) is
internally generated between HS-FET off and LS-
FET on, or LS-FET off and HS-FET on.
An internal compensation is app lied for COT
control to make a mo re stable o peration even
when cera mic capacit ors are u sed as output
capacitors, this internal compensation will then
improve the jitter perfor mance without affect th e
line or load regulation.
Heavy-Load Operation
continuous-conduction-mode (CCM). The CCM
mode operation is sh own in Figure 2 shown.
When V FB is below V REF, HS-MOSFET is turn ed
on for a fixed interval which is de termined by
one- shot on-timer as equation 1 shown. Wh en
the HS-MOSFET is tur ned off, th e LS-MOSF ET
is turned on until next period.
In CCM mo de operation, the swit ching frequency
is fairly constant and it is called PWM mode.
Light-Load Operation
With the load decrease, the indu ctor current
decrease to o. Once th e inductor current touch
zero, the operation is tr ansition from continuous-
conduction-mode (CCM) to
discontinuous-
conduction-mode (DCM).
The light load operatio n is shown in Figure 3.
When V FB is below V REF, HS-MOSFET is turn ed
on for a fixed interval which is de termined by
one- shot on-timer as equation 1 shown. Wh en
the HS-MOSFET is tur ned off, th e LS-MOSF ET
is turned o n until the inductor cur rent reache s
zero. In DCM operation, the V FB does not reach
VREF when the inductor current is approaching
zero. The L S-FET driver turns into tri-state (hig h
Z) whenever the inductor current reaches zero. A
current modulator take s over the control of LS-
FET and limits the inductor current to less than -
1mA. Henc e, the outp ut capacitor s discharge
slowly to GND through LS-FET. As a re sult, t he
efficiency at light lo ad condit ion is grea tly
improved. At light load condition, th e HS-FET is
not turned ON as frequently as at heavy loa d
condition. This is called skip mode.
At light loa d or no lo ad conditio n, the outp ut
drops very slowly and the NB675 reduces the
switching fr equency naturally and then high
efficiency is achieved at light load.
Figure 2—Heavy Load Operation
When the o utput current is high a nd the indu ctor
current is always above zero amps, it is called
Figure 3—Light Load Operation
NB675 Rev. 1.0
1/14/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
11
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet NB675.PDF ] | |
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