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PDF MP6212 Data sheet ( Hoja de datos )

Número de pieza MP6212
Descripción 3.3V - 5V Single-Channel 1A Current-Limited Power Distribution Switches
Fabricantes MPS 
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MP6211/MP6212
3.3V/5V, Single-Channel1A
Current-Limited Power Distribution Switches
The Future of Analog IC Technology
DESCRIPTION
The MP62 11/MP6212 single -channel Powe r
Distribution Switch fe atures inte rnal current limiting
to prevent damage to host devices due to faulty load
conditions. The MP6211/MP6212 Analog switch has
90mon-resistance and operates from 2.7V to 5.5V
input. It is a vailable with guarantee d current limits,
making it ideal for load switching ap plications. The
MP6211/MP6212 ha s bui lt-in prote ction for both
over current and increased thermal stress. For ove r
current, the device will limi t the current by changing
to a constant current mode.
As the temperatu re incre ases as a re sult of short
circuit, the device will shut off. The device will
recover on ce the device temperatu re redu ces to
approx 120°C.
The MP621 1/MP6212 is available in an 8-PIN
MSOP and SOIC package with exposed pad.
FEATURES
1A ContinuousCurrent
Accu rate Current Limit
2.7V to 5.5V Supply Range
90uA Quiescent Current
90m MOSFET
Therm al-Shutdown Protection
Und er-Voltage Lockout
8ms FLAG Deglitch Time
No FLAG Glitch During Power Up
Reverse Current Blocking
Active High & Active Low Options
MSOP8E and SOIC8E package
UL Recognized: E322138
APPLICATIONS
Smartpho ne and PDA
Portable GPS Device
N otebook PC
Set-top-box
Telecom and Network Systems
USB Power Distribution
“MPS” and “The Future of Analog IC Technology” are Trademarks of Monolithic
Power Systems, Inc.
TYPICAL APPLICATION
+5V
1 GND
MP6212
6, 7
2, 3 IN
OUT
4 EN
FLAG 5
To VBUS
USB Ports
SINGLE-CHANNEL
UL Recognized Component
MP6211_MP6212 Rev. 1.1
9/18/2009
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2009 MPS. All Rights Reserved.
1
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MP6212 pdf
MP6211/MP6212 –CURRENT-LIMITED POWER DISTRIBUTION SWITCHES
TYPICAL PERFORMANCE CHARACTERISTICS
VIN=5.5V, CL=2.2uF, TA = +25ºC, unless otherwise noted.
2.5 0.9
0.8
2
0.7
0.6
1.5
0.5
Supply Current, Output
Enabled vs. Input Voltage
VEN=5V
100
95
90
85
80
75
1
2.5
3.5 4.5 5.5
INPUT VOTAGE (V)
6.5
Static DrainS-ource On-State
Resistance Variation vs.
Ambient Temperature
VIN=5V, IO=0.1A
30
25
20
15
10
5
0
-5
-10
-15
-20
-25
-30
-45 -30 -15 0
15 30 45 60 75 90
0.4
2.5 34 3.5
4.5 5 5.5 6
INPUT VOTAGE (V)
Static Drain-Source On-State
Resistance vs. Input Voltage
VEN=5V, IOUT=1A
70
2.5 3 3.5 4 4.5 5 5.5 6
INPUT VOTAGE (V)
Input to Output Voltage
vs. Load Current
VEN=5V
120
110
100
90
80
70
2.5 3 3.5 4 4.5 5 5.5 6
INPUT VOLTAGE (V)
140
120
100
80
60
40
20
0
0
Vin=5.5V
Vin=5V
Vin=4V
Vin=3.3V
Vin=2.7V
0.2 0.4 0.6 0.8 1 1.2
OUTPUT CURRENT (A)
Short Circuit Output Current
vs. Input Voltage
VEN=5V, VIN=5V
1.75
1.7
1.65
1.6
1.55
1.5
1.45
1.4
2.5
3 3.5 4 4.5 5 5.5
INPUT VOLTAGE (V)
6
Threshold Trip Current
vs. Input Voltage
VEN=5V
2
1.9
1.8
1.7
1.6
1.5
2.5
3 3.5 4 4.5 5 5.5
INPUT VOLTAGE (V)
6
Current Limit Response
Time vs. Peak Current
VEN=5V
50
45
40
35
30
25
20
15
10
5
0
0 2 4 6 8 10 12
PEAK CURRENT (A)
MP6211_MP6212 Rev. 1.1
9/18/2009
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2009 MPS. All Rights Reserved.
5

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MP6212 arduino
MP6211/MP6212 –CURRENT-LIMITED POWER DISTRIBUTION SWITCHES
0.189(4.80)
0.197(5.00)
85
SOIC8E (EXPOSED PAD)
0.124(3.15)
0.136(3.45)
PIN 1 ID
0.150(3.80) 0.228(5.80)
0.157(4.00) 0.244(6.20)
0.089(2.26)
0.101(2.56)
14
TOP VIEW
BOTTOM VIEW
0.013(0.33)
0.020(0.51)
0.051(1.30)
0.067(1.70)
SEATING PLANE
0.000(0.00)
0.006(0.15)
0.050(1.27)
BSC
FRONT VIEW
0.024(0.61)
0.063(1.60)
0.050(1.27)
SEE DETAIL "A"
SIDE VIEW
0.0075(0.19)
0.0098(0.25)
GAUGE PLANE
0.010(0.25) BSC
0.010(0.25) x 45o
0.020(0.50)
0o-8o
0.016(0.41)
0.050(1.27)
DETAIL "A"
0.103(2.62)
0.138(3.51)
RECOMMENDED LAND PATTERN
0.213(5.40)
NOTE:
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN
BRACKET IS IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSIONS.
4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.004" INCHES MAX.
5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION BA.
6) DRAWING IS NOT TO SCALE.
NOTICE: The information in this docum ent is subject to chang e without notice. Users sh ould warrant and guarantee that third
party Int ellectual Prop erty r ights are n ot inf ringed u pon when i ntegrating MPS product s into any application. MPS w ill not
assume any legal responsibility for any said applications.
MP6211_MP6212 Rev. 1.1
9/18/2009
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2009 MPS. All Rights Reserved.
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