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PDF AK8185A Data sheet ( Hoja de datos )
| Número de pieza | AK8185A | |
| Descripción | Low - Jitter Clock Generator | |
| Fabricantes | AKM | |
| Logotipo |  |
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AK8185A
Low - Jitter Clock Generator with
Integrated VCO
-Preliminary-
AK8185A
- Features -
Low Phase Noise PLL
RMS jitter 0.4ps typ. (12kHz to 20MHz)
On chip VCO
4x Output Available
Pin-Selectable
LVPECL, LVDS, or 2-LVCMOS
LVCMOS Bypass Output Available
3.3V for Core
Operating Temperature Range: -40 to +85℃
Pin Package: 5mm x 5mm
32-pin Leadless QFN (Pb-free)
- Description -
AK8185A is a Low – Jitter Clock Generator with
sub pico-second jitter performance.
Also Low power consumption is the advantage
for advanced optimized application.
- Application -
Ethernet
SONET
Fibre Channel
SAN
Cost-Effective High-Frequency Crystal Oscillator
Replacement
- Block Diagram -
Vcc_IN Vcc_PLL1 Vcc_PLL2
Vcc_VCO Vcc_VDD Vcc_OUT
Input Frequency Range:
21.875MHz-28.47MHz
XIN
XO /
LVCMOS
Phase
Frequency
Detector
+15
+20
+24
+25
Feedback
Divider
VCO
RSTN
Charge
Pump
Loop
Filter
LVCMOS
Output Frequency Range:
43.75MHz-683.264MHz
+3
+4
+5
Prescaler
Divider
+.1
.
.
+4
+6
+8
Output
Divider
Output
Driver
LVPECL
LVCMOS
LVDS
LVPECL
LVCMOS
LVDS
LVPECL
LVCMOS
LVDS
LVPECL
LVCMOS
LVDS
PR[1...0]
OD[2...0] OS[1...0]
draft-E-02
Fig. 1
-1-
Dec. 2012
http://www.Datasheet4U.com
1 page  
AK8185A
Electrical Characteristics
All specifications at VDD=VDD_LVDS=VCP= 3.3V5%, Ta: -40 to +85℃, unless otherwise noted
Parameter Conditi
ons MIN TYP MAX Unit
Control Pin LVCMOS Input Characteristics
Input high voltage (VIH)
Input low voltage (VIL)
Input high current (IIH)
Input low current (IIL)
LVCMOS Output Characteristics
Bypass output frequency
Output frequency
Output high voltage
Output low voltage
RMS phase jitter
Output rise/fall slew rate
Output duty cycle
Skew between outputs
250MHZ (10kHz to 20MHz)
20% ⇔ 80%
LVPECL Output Characteristics
Output frequency
Output high voltage
Output low voltage
Differential output voltage
RMS phase jitter
Output rise/fall slew rate
Output duty cycle
Skew between outputs
LVDS Output Characteristics
Output frequency
Differential output voltage
Magnit ude change
Common-mode voltage
Magnit ude change
RMS phase jitter
Output rise/fall time
Output duty cycle
Skew between outputs
625MHZ (10kHz to 20MHz)
20% ⇔ 80%
625MHZ (10kHz to 20MHz)
20% ⇔ 80%
0.6Vcc
0.4Vcc
200
-200
V
V
uA
uA
21.875
43.75
Vcc-0.5
0.4
2.4
45
10
28.47
250
0.3
MHz
MHz
V
ps, RMS
55 %
ps
43.75
683.264 MHz
Vcc-1.18
Vcc-0.73 V
Vcc-2
Vcc-1.55 V
0.6 1.23 V
0.4 ps, RMS
175 ps
45 55 %
10 ps
43.75
0.247
1.125
45
683.264 MHz
0.454
V
50 mV
1.375
V
50 mV
0.4 ps, RMS
255 ps
55 %
10 ps
draft-E-02
Dec. 2012
-5-
5 Page 
Package Information
Mechanical data
AK8185A
RoHS Compliance
All integrated circuits form Asahi Kasei Microdevices Corporation (AKM)
assembled in “lead-free” packages* are fully compliant with RoHS.
(*) RoHS compliant products from AKM are identified with “Pb free” letter indication on
product label posted on the anti-shield bag and boxes.
draft-E-02
- 11 -
Dec. 2012
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet AK8185A.PDF ] | |
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