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PDF AK8160B Data sheet ( Hoja de datos )

Número de pieza AK8160B
Descripción Multi Clock Generator IC
Fabricantes AKM 
Logotipo AKM Logotipo



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[AK8160B]
AK8160B
Low Power & Low Jitter Clock Generator for PCI Express
1. General Description
The AK8160B is a member of AKMs low power and low jitter clock generator family designed for PCI
Express generation 2.0. This device has one PLL with spread spectrum (SS) function and is enable to output
high quality differential 100MHz as PCI Express clock and 25MHz as reference simultaneously.
2. Features
Low Current Consumption
31mA Typ. (Full function, 25MHz output and 100MHz output)
25MHz Crystal Input
One single-end 25MHz-Reference Output without Spread Spectrum
Two differential 100MHz Clock Outputs with Spread Spectrum
Selectable Spread Spectrum ON / OFF
Spread Spectrum Modulation ratio
0% (Off), -0.5%
Spread Spectrum Modulation frequency
30kHz to 33kHz
Low Jitter Performance of 100MHz Output Clock
RMS Jitter: 2.6ps Max. (PCIE0p-1p/0n-1n pin, BW=10kHz 1.5MHz)
2.6ps Max. (PCIE0p-1p/0n-1n pin, BW=1.5MHz 50MHz)
Cycle to Cycle Jitter: 125ps Max. (PCIE0p-1p/0n-1n pin)
23ps Typ. (1σ), (REFOUT pin)
Supply Voltage
3.0V 3.6V
Operating Temperature Range
-40C to +85C
Package
0.4mm pitch 3mm x 3mm 20-pin QFN (Lead free)
Application
- DSLR : Digital Single-Lens Reflex camera
- Network apparatus, Server, Datacenter
- MFP : Multi-Function Printer
- Game
MS1576-E-00
-1-
2013/10
http://www.Datasheet4U.com

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AK8160B pdf
[AK8160B]
11 PCIE1_OE
PCIE1p/n Output Control Pin
DI
This pin must be connected to Hor L.
PCIE1_OE = L: PCIE1p/n outputs L.
PCIE1_OE = H: PCIE1p/n outputs 100MHz.
12 PCIE0_OE
PCIE0p/n Output Control Pin
DI
This pin must be connected to Hor L.
PCIE0_OE = L: PCIE0p/n outputs L.
PCIE0_OE = H: PCIE0p/n outputs 100MHz.
13 VDD2 PWR Power Supply Pin 2
14 VSS2 PWR Ground Pin 2
15 XOUT
AO 25MHz Crystal Connection Pin
16 XIN
AI 25MHz Crystal Connection Pin
17 VSS1 PWR Ground Pin 1
18 VDD1 PWR Power Supply Pin 1
19 REFOUT
DO 25MHz Output Pin
25MHz Output Control Pin
20 REFOUT_OE
DI
This pin must be connected to Hor L.
REFOUT_OE = L: REFOUT outputs L.
REFOUT_OE = H: REFOUT outputs 25MHz.
Exposed Pad
---
Connecting exposed pad of package to board ground must be
required.
Note:
AI : Analog input pin
AO : Analog output pin
DI : Digital input pin
DO : Digital output pin
PWR : Power supply and Ground pin
MS1576-E-00
-5-
2013/10

5 Page





AK8160B arduino
[AK8160B]
Vrb_max=100mV
Vrb_min=-100mV
Ring Back
Prohibited Ring Back Voltage Range
Differential (PCIE0/1p)-(PCIE0/1n)
Figure 9. Definition of Output Ring Back Voltage Margin
Tstable
Ring Back
+150mV
-150mV
Differential (PCIE0/1p)-(PCIE0/1n)
Tstable
Figure 10. Definition of Output Ring Back Time
Crystal Specification
Murata Manufacturing Co.,Ltd, XRCGB25M000F3M00R0
Parameter
Symbol
Conditions
Crystal Clock Frequency f0 CL=6[pF]
Series Resistance
R1
Shunt Capacitance
C0
Motional Capacitance
C1
Motional Inductance
L1
Power level
Min
Typ
25.000
56.9
0.59
1.29
31.52
Crystal
L1 R1 C1
Max Unit
MHz
150 Ω
pF
fF
mH
300 W
C0
Load Capacitance
CL
CL
Figure 11. Equivalent parameters of crystal and load capacitance
MS1576-E-00
- 11 -
2013/10

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