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PDF AK8142 Data sheet ( Hoja de datos )
| Número de pieza | AK8142 | |
| Descripción | Programable Clock Generator IC | |
| Fabricantes | AKM | |
| Logotipo |  |
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ASAHI KASEI EMD CORPORATION
Programmable
Clock Generator
AK8142
Features
• Supply Voltage:
3.0 – 3.6V(Main)
1.8 – 3.3V(Interface)
• Low Current Consumption:
5.0mA (Typ.)
• Crystal Unit Oscillation:
16.0MHz – 32.0MHz
• Input Frequency:
2.0MHz – 67.0MHz
• Output Frequency:
4.0MHz – 200MHz
• Low Jitter Performance:
15 ps (Typ.) Period 1σ
• Operating Temperature Range:
-30 to +85℃
• I2C Interface:
• Package:
16-pin TSSOP
Block Diagram
XOUT
XIN
（EXTIN）
FSEL
SDA
SCL
RESET
A0
A1
Crystal
OSC
MDIV
MDIVC[3:0]
MDIVPG[2:0]
Control 1
Register0
Description
The AK8142 is a programmable clock generator IC
with an integrated Fractional N PLL. Highly accurate
clocks can be output from an external master clock or
a crystal unit.
Applications
• General purpose clock generator
VDD
REFOUTEN[1:0]
CKOFF[0]
REFOUT
Phase
Comparator
Charge
Pump
LPF
ODIVPG[3:0]
OUTC[2:0]
CKOUTEN[1:0]
ＶＣＯ
ODIV
CKOFF[1]
CKOUT
NDIV
FRAC[17:0]
INT[6:0]
⊿∑
Modulator
GND
AK8142 Register Programmable Clock Generator
MS0932-E-01
1
Jan-09
http://www.Datasheet4U.com
1 page  
The brand name
of AKEMD’s IC’s
AK8142
AC Characteristics
All specifications at VDD1: 3.3V, VDD2/VDD3: 1.8V, Ta: -30 to +85℃, unless otherwise noted
Parameter
Symbol
Phase Comparison Period (1)
VCO Frequency (2)
Output Clock Frequency (3)
Output Clock Duty Cycle (4)(7)
Output Clock Rise Time (4)(7) trise
Output Clock Fall Time (4)(7)
tfall
Output Clock Jitter (4)(7)
Output Lock Time (6)
Jit
tlock
Conditions
CKOUT
CKOUT, Divided
CKOUT, not Divided
REFOUT (5)
CKOUT, Divided
CKOUT, not Divided
REFOUT, 0.2VDD to 0.8VDD
2MHz – 66.0MHz
CKOUT, 0.2VDD to 0.8VDD
4MHz – 100MHz
CKOUT, 0.2VDD to 0.8VDD
100MHz – 150MHz
CKOUT, 0.2VDD to 0.8VDD
150MHz – 200MHz
REFOUT, 0.2VDD to 0.8VDD
2MHz – 66.0MHz
CKOUT, 0.2VDD to 0.8VDD
4MHz – 100MHz
CKOUT, 0.2VDD to 0.8VDD
100MHz – 150MHz
CKOUT, 0.2VDD to 0.8VDD
150MHz – 200MHz
CKOUT, Period, 1σ
CKOUT, Power-up
MIN
2
100
4.0
100
40
45
30
TYP MAX Unit
4 MHz
MHz
100 MHz
200 MHz
50 60
50 55 %
50 70
3.0 ns
3.0 ns
2.5 ns
2.0 Ns
3.0 Ns
3.0 Ns
2.5 ns
2.0 ns
15 ps
1 ms
(1) Phase Comparison Frequency = Input frequency / MDIV value. Refer to register address FA.
(2) VCO Frequency = Phase Comparison Frequency x NDIV value. Refer to register address FC.
(3) Refer to register address FB.
(4) With the load capacitance specified by the recommended operation conditions.
(5) Quartz oscillator input or external clock input with 50% duty.
(6) The time that output reaches the target frequency within accuracy of ±0.1% from the point that the FSEL is
switched.
(7) Design value
MS0932-E-01
-5-
Jan-09
5 Page 
The brand name
of AKEMD’s IC’s
AK8142
Address FB
Address
FB
D7
－
D6
OUTC[2]
D5
OUTC[1]
D4 D3 D2 D1 D0
OUTC[0] ODIVPG[3] ODIVPG[2] ODIVPG[1] ODIVPG[0]
OUTC[2]
OUTC[1:0]
ODIVPG[3:0]
Programmable divider input select
0 VCO output (not divided)
1 VCO 1/2 output
PLL output select
OUTC[1:0]
0 0 VCO output (not divided)
0 1 VCO 1/2 output
1 0 VCO 1/4 output
1 1 VCO programmable divider output
Programmable divider control
ODIVPG[3:0] Dividing value
0000
(Fixed output)
0001
4
0010
6
0011
8
0100
10
0101
12
0110
14
0111
16
1000
18
1001
20
1010
22
1011
24
1100
26
1101
28
1110
30
1111
(Fixed output)
VCO
ODIV
1/2
1/4
1/2 Programmable Div.
PLLOut
OUTC[2]
ODIVPG[3:0]
OUTC[1:0]
MS0932-E-01
- 11 -
Jan-09
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet AK8142.PDF ] | |
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