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PDF AK4591 Data sheet ( Hoja de datos )
| Número de pieza | AK4591 | |
| Descripción | 24bit 4ch ADC + 24bit 6ch DAC | |
| Fabricantes | AKM | |
| Logotipo |  |
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[AK4591]
AK4591
24bit 4ch ADC with Input selector + 24bit 6ch DAC
1.General Description
The AK4591 is a unique CODEC that combines both high performance and integration in a single chip.
The uniqueness begins with the ADC input selector that can select 2 sets of stereo data from 9 sets of available stereo
inputs. The 4ch ADC and 6 ch DAC offer high qualityanalog performance with 97dB (48 kHz) dynamic range on the
ADC and 107dB (48 kHz) dynamic range on the DAC. This CODEC supports sampling frequencies from 8 kHz to
96 kHz and is suitable for rear seat entertainment to select and distribute 2 different sources in an automotive
environment. The AK4591 is packaged in a 64-lead LQFP package offering an operational temperature range of
-40°C to 85°C.
2. Features
Input selector
- Selects 2 sets of stereo data from 9 sets of available stereo inputs
- 2 stereo sets of differential
- 7 stereo sets of single ended
ADC: 4 Channels (2 sets of stereo ADC)
- 24-bit 64 x Over-sampling delta sigma
- DR, S/N :
97dBA (Fs: 48kHz Full-differential Input)
- S/(N+D) :
92 dB (Fs: 48kHz Full-differential Input)
- 8kHz to 96kHz sampling rate
- HPF included for DC offset cancellation
DAC: 6 Channels (3 sets of stereo DAC)
- 24-bit 128 x Over-sampling advanced multi-bit
- DR :
107dBA (6ch) (Fs: 48kHz)
- S/N:
108dBA(6ch) (Fs: 48kHz)
- S/(N+D) :
90 dB (6ch) (Fs: 48kHz)
- 8kHz to 96kHz sampling rate
Digital Interface
- Serial audio signal input port :
8ch
- Serial audio signal output port : 4ch
- Serial interface port for micro-controller : 1set
Other
- Power supply: +
3.3V ±0.3V
- Operating temperature range:
-40°C~85°C
- Package :
64pin
LQFP(0.5mm pitch)
[MS0295-E-01]
-1-
2012/12
http://www.Datasheet4U.com
1 page  
[AK4591]
Pin No.
36
37
38
39
40
41
Pin name
DVSS
DVDD
LRCLK
BITCLK
MCLK
CS
I/O Function
- Ground pin for digital section 0.0V
- Power supply pin for digital section 3.3V(typ)
I
LR channel select clock pin
Input the fs clock
I
Serial bit clock pin
Inputs 64fs. (32 and 48fs are available with conditions attached).
I Master clock input pin
Chip select pin for Microcomputer. (with pull down)
I CS =”H”: SI data cannot be input. SO becomes Hi-z.
If CS is not used, connect to DVSS.
Classification
Digital power supply
System clock
Microcomputer
Interface
42 S_RESET I System Reset pin
Reset
43
INIT_RESET
I
Reset pin ( for initialization )
Used for initialization of the AK4591.
Soft mute pin ( with pull down )
44
SMUTE
Digital Soft mute for DAC. SMUTE=”H”: Soft mute enabled.
I SMUTE=”L”: Soft mute disabled.
(Soft mute also can be controlled by a control register.)
45
SDATI1
I
DAC1 Serial data input pin ( with pull down )
Compatible with MSB/LSB justified 24,16bits and I2S.
Control
Digital section
Serial input data
46
SDATI2
I
DAC2 Serial data input pin ( with pull down )
Compatible with MSB/LSB justified 24,16bits and I2S.
47
SDATI3
I
DAC3 Serial data input pin ( with pull down )
Compatible with MSB/LSB justified 24,16bits and I2S.
48
TESTI
I
Test pin ( with pull down )
Connect to DVSS.
Control
49 AOUTR3- O DAC3 Rch analog inverted output pin.
Analog output
50 AOUTR3+ O DAC3 Rch analog non-inverted output pin.
51 AOUTL3- O DAC3 Lch analog inverted output pin.
52 AOUTL3+ O DAC3 Lch analog non-inverted output pin.
Analog Reference voltage input pin
Analog section
53
VREFH
I Normally, connect to AVDD (54pin) with 0.1μF and 10μF capacitors
between this pin and AVSS.
54
AVDD
- Power supply pin for analog section 3.3V(typ)
Power supply
55
AVSS
- Analog ground 0.0V
56
VREFL
I
Analog low level Reference voltage input pin
Normally, connect to AVSS (55pin).
Analog section
57 AOUTR2- O DAC2 Rch analog inverted output pin.
Analog output
58 AOUTR2+ O DAC2 Rch analog non-inverted output pin.
59 AOUTL2- O DAC2 Lch analog inverted output pin.
60 AOUTL2+ O DAC2 Lch analog non-inverted output pin.
61 AOUTR1- O DAC1 Rch analog inverted output pin.
62 AOUTR1+ O DAC1 Rch analog non-inverted output pin.
63 AOUTL1- O DAC1 Lch analog inverted output pin.
64 AOUTL1+ O DAC1 Lch analog non-inverted output pin.
Note) Don’t leave Digital input pin (29, 30, 31, 35, 38~48pin) open except for pull down pins.
Pull down pins indicated as (with pull down).
(When pull down pin does not use, then leave open or connect to DVSS)
(We recommend connecting TESTI (48pin) with DVSS.)
[MS0295-E-01]
-5-
2012/12
5 Page 
[AK4591]
(5) Switching characteristics
5-1) System clock
(AVDD=DVDD=3.0~3.6V,Ta=-40°C~85°C)
Parameter
Symbol
MCLK
Duty factor
CKS=0 (Note
1) fMCLK
DFS[1:0]=0h
DFS[1:0]=1h
DFS[1:0]=2h
CKS=1 (Note
DFS[1:0]=0h
DFS[1:0]=1h
1) fMCLK
Clock rise time
tCR
Clock fall time
tCF
LRCLK : frequency (Note 1)
DFS[1:0]=0h
DFS[1:0]=1h
DFS[1:0]=2h
Clock rise time
Clock fall time
fs
tLR
tLF
BITCLK : frequency (Note 2)
High level width
Low level width
Clock rise time
Clock fall time
fBCLK (32)
tBCLKH
tBCLKL
tBR
tBF
min
40
2.0
8.0
20.48
3.5
12.0
8
8
80
72
72
typ
50
12.288
8.192
24.576
18.432
12.288
1
max
60
12.8
12.8
25.0
19.2
19.2
6
6
-
48
12
96
6
6
64
ns
6
6
Unit
%
MHz
MHz
MHz
MHz
MHz
ns
ns
fs
kHz
kHz
kHz
ns
ns
fs
ns
ns
ns
Note 1) CKS,CKS1,DFS[1:0] are setting values for control register.
Note 2) BITCLK can use normally 64fs. 48fs and 32fs are also available. However, 32fs and 48fs
mode have some limitation.
5-2) Reset
(AVDD=DVDD=3.0~3.6V,Ta=-40°C~85°C)
Parameter Sy
mbol
min
typ
max
Unit
INIT_RESET
Note 1
tRST 400
ns
S_RESET
Note 1
tRST 400
ns
Note 1) “L” is acceptable when power is turned on, but after stable power level it must keep at least “min” time.
[MS0295-E-01]
- 11 -
2012/12
11 Page | ||
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| PDF Descargar | [ Datasheet AK4591.PDF ] | |
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