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PDF TDA8920C Data sheet ( Hoja de datos )

Número de pieza TDA8920C
Descripción 2 x 110 W class-D power amplifier
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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TDA8920C
2 × 110 W class-D power amplifier
Rev. 02 — 11 June 2009
Product data sheet
1. General description
The TDA8920C is a high-efficiency class-D audio power amplifier. The typical output
power is 2 × 110 W with a speaker load impedance of 4 .
The TDA8920C is available in both HSOP24 and DBS23P power packages. The amplifier
operates over a wide supply voltage range from ±12.5 V to ±32.5 V and features low
quiescent current consumption.
2. Features
I Pin compatible with TDA8950/20B for both HSOP24 and DBS23P packages
I Symmetrical operating supply voltage range from ±12.5 V to ±32.5 V
I Stereo full differential inputs, can be used as stereo Single-Ended (SE) or mono
Bridge-Tied Load (BTL) amplifier
I High output power in typical applications:
N SE 2 × 110 W, RL = 4 (VP = ±30 V)
N SE 2 × 125 W, RL = 4 (VP = ±32 V)
N SE 2 × 120 W, RL =3 (VP = ±29 V)
N BTL 1 × 220 W, RL =8 (VP = ±30 V)
I Low noise
I Smooth pop noise-free start-up and switch off
I Zero dead time switching
I Fixed frequency
I Internal or external clock
I High efficiency
I Low quiescent current
I Advanced protection strategy: voltage protection and output current limiting
I Thermal FoldBack (TFB)
I Fixed gain of 30 dB in SE and 36 dB in BTL applications
I Fully short-circuit proof across load
I BD modulation in BTL configuration
3. Applications
I DVD
I Mini and micro receiver
I Home Theater In A Box (HTIAB) system
I High-power speaker system
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TDA8920C pdf
NXP Semiconductors
TDA8920C
2 × 110 W class-D power amplifier
7.2 Pin description
Table 3.
Symbol
VSSA
SGND
VDDA
IN2M
IN2P
MODE
OSC
IN1P
IN1M
n.c.
n.c.
n.c.
PROT
VDDP1
BOOT1
OUT1
VSSP1
STABI
n.c.
VSSP2
OUT2
BOOT2
VDDP2
VSSD
Pin description
Pin
TDA8920CTH TDA8920CJ
1 18
2 19
3 20
4 21
5 22
6 23
71
82
93
10 4
11 5
12 6
13 7
14 8
15 9
16 10
17 11
18 12
19 -
20 13
21 14
22 15
23 16
24 17
Description
negative analog supply voltage
signal ground
positive analog supply voltage
channel 2 negative audio input
channel 2 positive audio input
mode selection input: Standby, Mute or Operating
mode
oscillator frequency adjustment or tracking input
channel 1 positive audio input
channel 1 negative audio input
not connected
not connected
not connected
decoupling capacitor for protection (OCP)
channel 1 positive power supply voltage
channel 1 bootstrap capacitor
channel 1 PWM output
channel 1 negative power supply voltage
decoupling of internal stabilizer for logic supply
not connected
channel 2 negative power supply voltage
channel 2 PWM output
channel 2 bootstrap capacitor
channel 2 positive power supply voltage
negative digital supply voltage
8. Functional description
8.1 General
The TDA8920C is a two-channel audio power amplifier that uses class-D technology.
For each channel, the audio input signal is converted into a digital PWM signal using an
analog input stage and a PWM modulator; see Figure 1. To drive the output power
transistors, the digital PWM signal is fed to a control and handshake block and to high-
and low-side driver circuits. This level-shifts the low-power digital PWM signal from a logic
level to a high-power PWM signal switching between the main supply lines.
A 2nd-order low-pass filter converts the PWM signal to an analog audio signal that can be
used to drive a loudspeaker.
TDA8920C_2
Product data sheet
Rev. 02 — 11 June 2009
© NXP B.V. 2009. All rights reserved.
5 of 39

5 Page





TDA8920C arduino
NXP Semiconductors
TDA8920C
2 × 110 W class-D power amplifier
8.3.4 Supply voltage protection
If the supply voltage drops below the minimum supply voltage threshold, VP(uvp), the UVP
circuit will be activated and the system will shut down. Once the supply voltage rises
above VP(uvp) again, the system will restart after a delay of 100 ms.
If the supply voltage exceeds the maximum supply voltage threshold, VP(ovp), the OVP
circuit will be activated and the power stages will be shut down. When the supply voltage
drops below VP(ovp) again, the system will restart after a delay of 100 ms.
An additional UnBalance Protection (UBP) circuit compares the positive analog supply
voltage (on pin VDDA) with the negative analog supply voltage (on pin VSSA) and is
triggered if the voltage difference exceeds a factor of two (VDDA > 2 ×| VSSA| OR |VSSA| >
2 × VDDA). When the supply voltage difference drops below the unbalance threshold,
VP(ubp), the system restarts after 100 ms.
An overview of all protection circuits and their respective effects on the output signal is
provided in Table 5.
Table 5. Overview of TDA8920C protection circuits
Protection name Complete
shutdown
Restart directly
TFB[1]
N
N
OTP
Y
N
OCP
Y[2]
N[2]
WP N[3] Y
UVP
Y
N
OVP
Y
N
UBP
Y
N
Restart after
100 ms
N
Y
Y[2]
N
Y
Y
Y
Pin PROT
detection
N
N
Y
N
N
N
N
[1] Amplifier gain depends on the junction temperature and heatsink size.
[2] The amplifier shuts down completely only if the short-circuit impedance is below the impedance threshold
(Zth; see Section 8.3.2). In all other cases, current limiting results in a clipped output signal.
[3] Fault condition detected during any Standby-to-Mute transition or during a restart after OCP has been
activated (short-circuit to one of the supply lines).
8.4 Differential audio inputs
The audio inputs are fully differential ensuring a high common mode rejection ratio and
maximum flexibility in the application.
Stereo operation: to avoid acoustical phase differences, the inputs should be in
antiphase and the speakers should be connected in antiphase. This configuration:
minimizes power supply peak current
minimizes supply pumping effects, especially at low audio frequencies
Mono BTL operation: the inputs must be connected in anti-parallel. The output of one
channel is inverted and the speaker load is connected between the two outputs of the
TDA8920C. In practice (because of the OCP threshold) the output power can be
boosted to twice the output power that can be achieved with the single-ended
configuration.
The input configuration for a mono BTL application is illustrated in Figure 7.
TDA8920C_2
Product data sheet
Rev. 02 — 11 June 2009
© NXP B.V. 2009. All rights reserved.
11 of 39

11 Page







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