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PDF PIC12LCE674 Data sheet ( Hoja de datos )

Número de pieza PIC12LCE674
Descripción 8-Bit CMOS Microcontroller
Fabricantes Microchip 
Logotipo Microchip Logotipo



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PIC12C67X
8-Pin, 8-Bit CMOS Microcontroller with A/D Converter
and EEPROM Data Memory
Devices Included in this Data Sheet:
• PIC12C671
• PIC12C672
• PIC12CE673
• PIC12CE674
Note:
Throughout this data sheet PIC12C67X
refers to the PIC12C671, PIC12C672,
PIC12CE673 and PIC12CE674.
PIC12CE67X refers to PIC12CE673 and
PIC12CE674.
High-Performance RISC CPU:
• Only 35 single word instructions to learn
• All instructions are single cycle (400 ns) except for
program branches which are two-cycle
• Operating speed: DC - 10 MHz clock input
DC - 400 ns instruction cycle
Device
Program
Memory
Data
RAM
Data
EEPROM
PIC12C671 1024 x 14 128 x 8
PIC12C672 2048 x 14 128 x 8
PIC12CE673 1024 x 14 128 x 8
16 x 8
PIC12CE674 2048 x 14 128 x 8
16 x 8
• 14-bit wide instructions
• 8-bit wide data path
• Interrupt capability
• Special function hardware registers
• 8-level deep hardware stack
• Direct, indirect and relative addressing modes for
data and instructions
Peripheral Features:
• Four-channel, 8-bit A/D converter
• 8-bit real time clock/counter (TMR0) with 8-bit
programmable prescaler
• 1,000,000 erase/write cycle EEPROM data
memory
• EEPROM data retention > 40 years
Pin Diagrams:
PDIP, SOIC, Windowed CERDIP
VDD
GP5/OSC1/CLKIN
GP4/OSC2/AN3/
CLKOUT
GP3/MCLR/VPP
1
2
3
4
8
7
6
5
PDIP, Windowed CERDIP
VDD
GP5/OSC1/CLKIN
GP4/OSC2/AN3/
CLKOUT
GP3/MCLR/VPP
1
2
3
4
8
7
6
5
VSS
GP0/AN0
GP1/AN1/VREF
GP2/T0CKI/AN2/
INT
VSS
GP0/AN0
GP1/AN1/VREF
GP2/T0CKI/AN2/
INT
Special Microcontroller Features:
• In-Circuit Serial Programming (ICSP™)
• Internal 4 MHz oscillator with programmable calibration
• Selectable clockout
• Power-on Reset (POR)
• Power-up Timer (PWRT) and Oscillator Start-up
Timer (OST)
• Watchdog Timer (WDT) with its own on-chip RC
oscillator for reliable operation
• Programmable code protection
• Power saving SLEEP mode
• Interrupt-on-pin change (GP0, GP1, GP3)
• Internal pull-ups on I/O pins (GP0, GP1, GP3)
• Internal pull-up on MCLR pin
• Selectable oscillator options:
- INTRC: Precision internal 4 MHz oscillator
- EXTRC: External low-cost RC oscillator
- XT:
- HS:
Standard crystal/resonator
High speed crystal/resonator
- LP: Power saving, low frequency crystal
CMOS Technology:
• Low-power, high-speed CMOS EPROM/EEPROM
technology
• Fully static design
• Wide operating voltage range 2.5V to 5.5V
• Commercial, Industrial and Extended
temperature ranges
• Low power consumption
< 2 mA @ 5V, 4 MHz
15 A typical @ 3V, 32 kHz
< 1 A typical standby current
1997-2013 Microchip Technology Inc.
DS30561C-page 1
http://www.Datasheet4U.com/

1 page




PIC12LCE674 pdf
2.0 PIC12C67X DEVICE VARIETIES
A variety of frequency ranges and packaging options
are available. Depending on application and production
requirements, the proper device option can be selected
using the information in the PIC12C67X Product Iden-
tification System section at the end of this data sheet.
When placing orders, please use that page of the data
sheet to specify the correct part number.
For example, the PIC12C67X device “type” is indicated
in the device number:
1. C, as i n P IC12C671. These de vices hav e
EPROM ty pe m emory a nd ope rate o ver th e
standard voltage range.
2. LC, as in PIC1 2LC671. Th ese de vices h ave
EPROM ty pe m emory an d op erate over an
extended voltage range.
3. CE, as in PIC12 CE674. These de vices hav e
EPROM type memory, EEPROM data memory
and operate over the standard voltage range.
4. LCE, as in PIC12LCE674. These devices have
EPROM type memory, EEPROM data memory
and operate over an extended voltage range.
2.1 UV Erasable Devices
The U V erasable v ersion, offered in windowed pack-
age, is optimal for prototype development and pilot pro-
grams.
The U V erasable v ersion ca n b e e rased and rep ro-
grammed to a ny o f t he configuration modes.
Microchip's PIC STARTPlu s an d PR O MATEpr o-
grammers b oth s upport t he PIC12C67X. Third party
programmers also are available; refer to the Microchip
Third Party Guide for a list of sources.
Note:
Please note that erasing the device will
also e rase t he p re-programmed i nternal
calibration value for the in ternal oscillator.
The calibration value must be saved prior
to erasing the part.
2.2 One-Time-Programmable (OTP)
Devices
The availability of OTP devices is especially useful for
customers w ho ne ed t he flexibility f or fre quent code
updates and small volume applications.
The OTP devices, packaged in plastic packages, per-
mit the user to program them once. In a ddition to th e
program m emory, the configuration bits m ust a lso b e
programmed.
PIC12C67X
2.3 Quick-Turn-Programming (QTP)
Devices
Microchip offers a Q TP Programming Service for fac-
tory production orders. This service is made available
for users who choose not to program a medium to high
quantity of units and whose code patterns have stabi-
lized. The devices are identical to the OTP devices, but
with al l EPR OM locations an d co nfiguration opti ons
already programmed by the factory. Certain code and
prototype verification procedures apply before produc-
tion shipments are available. Please contact your local
Microchip Technology sales office for more details.
2.4 Serialized Quick-Turn Programming
(SQTPSM) Devices
Microchip offers a unique programming service where
a f ew user-defined lo cations in eac h de vice are p ro-
grammed with different serial numbers. The serial num-
bers may be random, pseudo-random, or sequential.
Serial prog ramming a llows e ach de vice to have a
unique n umber w hich c an serve as a n en try-code,
password, or ID number.
1997-2013 Microchip Technology Inc.
DS30561C-page 5
http://www.Datasheet4U.com/

5 Page





PIC12LCE674 arduino
4.0 MEMORY ORGANIZATION
4.1 Program Memory Organization
The PIC12C67X has a 13-bit program counter capable
of addressing an 8K x 14 program memory space.
For the PIC12C671 and the PIC12CE673, the first 1K x
14 (0000h-03FFh) is implemented.
For the PIC12C672 and the PIC12CE674, the first 2K
x 14 (0000h-07FFh) is implemented. Accessing a loca-
tion a bove th e ph ysically implemented add ress w ill
cause a wraparound. The reset vector is at 0000h and
the interrupt vector is at 0004h.
FIGURE 4-1: PIC12C67X PROGRAM
MEMORY MAP AND STACK
PC<12:0>
CALL, RETURN
RETFIE, RETLW
13
Stack Level 1
Stack Level 8
Reset Vector
0000h
PIC12C67X
4.2 Data Memory Organization
The data memory is partitioned into two banks, which
contain the General Purpose Registers and the Special
Function Registers. Bit RP0 is the bank select bit.
RP0 (STATUS<5>) = 1 Bank 1
RP0 (STATUS<5>) = 0 Bank 0
Each Bank extends up to 7F h (128 bytes). The lower
locations of eac h Ban k are reserved for th e Spec ial
Function Registers. Above the Special Function Regis-
ters are Ge neral Purpose R egisters im plemented as
static RAM. Both Bank 0 and Bank 1 co ntain Special
Function Registers. Some "high use" Special Function
Registers from Bank 0 are mirrored in Bank 1 for code
reduction and quicker access.
Also note that F0h through FFh on the PIC12C67X is
mapped in to Ba nk 0 registers 70h-7Fh as c ommon
RAM.
4.2.1 GENERAL PURPOSE REGISTER FILE
The register file can be accessed either directly or indi-
rectly thr ough the File Select R egister FSR
(Section 4.5).
Peripheral Interrupt Vector 0004h
0005h
On-Chip Program
Memory
(PIC12C672 and
PIC12CE674 only)
03FFh
0400h
07FFh
0800h
1FFFh
1997-2013 Microchip Technology Inc.
DS30561C-page 11
http://www.Datasheet4U.com/

11 Page







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