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PDF SI8621 Data sheet ( Hoja de datos )
| Número de pieza | SI8621 | |
| Descripción | Low-Power Single and Dual-Channel Digital Isolators | |
| Fabricantes | Silicon Laboratories | |
| Logotipo |  |
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Si861x/2x Data Sheet
Low-Power Single and Dual-Channel Digital Isolators
Silicon Lab's family of ultra-low-power digital isolators are CMOS devices offering sub-
stantial data rate, propagation delay, power, size, reliability, and external BOM advantag-
es over legacy isolation technologies. The operating parameters of these products re-
main stable across wide temperature ranges and throughout device service life for ease
of design and highly uniform performance. All device versions have Schmitt trigger inputs
for high noise immunity and only require VDD bypass capacitors.
Data rates up to 150 Mbps are supported, and all devices achieve propagation delays of
less than 10 ns. Ordering options include a choice of isolation ratings (2.5, 3.75 and 5
kV) and a selectable fail-safe operating mode to control the default output state during
power loss. All products are safety certified by UL, CSA, VDE, and CQC, and products in
wide-body packages support reinforced insulation withstanding up to 5 kVRMS.
Applications
• Industrial automation systems
• Medical electronics
• Hybrid electric vehicles
• Isolated switch mode supplies
• Isolated ADC, DAC
• Motor control
• Power inverters
• Communications systems
Safety Regulatory Approvals
• UL 1577 recognized
• Up to 5000 VRMS for 1 minute
• CSA component notice 5A approval
• IEC 60950-1, 61010-1, 60601-1 (reinforced insulation)
• VDE certification conformity
• Si862xxT options certified to reinforced VDE 0884-10
• All other options certified to IEC 60747-5-5 and reinforced 60950-1
• CQC certification approval
• GB4943.1
KEY FEATURES
• High-speed operation
• DC to 150 Mbps
• No start-up initialization required
• Wide Operating Supply Voltage
• 2.5–5.5 V
• Up to 5000 VRMS isolation
• Reinforced VDE 0884-10, 10 kV surge-
capable (Si862xxT)
• 60-year life at rated working voltage
• High electromagnetic immunity
• Ultra low power (typical)
5 V Operation
• 1.6 mA per channel at 1 Mbps
• 5.5 mA per channel at 100 Mbps
2.5 V Operation
• 1.5 mA per channel at 1 Mbps
• 3.5 mA per channel at 100 Mbps
• Schmitt trigger inputs
• Selectable fail-safe mode
• Default high or low output (ordering
option)
• Precise timing (typical)
• 10 ns propagation delay
• 1.5 ns pulse width distortion
• 0.5 ns channel-channel skew
• 2 ns propagation delay skew
• 5 ns minimum pulse width
• Transient Immunity 50 kV/µs
• AEC-Q100 qualification
• Wide temperature range
• –40 to 125 °C
• RoHS-compliant packages
• SOIC-16 wide body
• SOIC-8 narrow body
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Rev. 1.6
1 page  
Si861x/2x Data Sheet
Device Operation
3. Device Operation
Device behavior during start-up, normal operation, and shutdown is shown in Figure 3.1 Device Behavior during Normal Operation on
page 5, where UVLO+ and UVLO– are the respective positive-going and negative-going thresholds. Refer to the following table to
determine outputs when power supply (VDD) is not present.
Table 3.1. Si86xx Logic Operation
VI Input1, 2 VDDI State1, 3, 4 VDDO State1, 3, 4 VO Output1, 2
Comments
HP
P H Normal operation.
LP
PL
X5 UP
P L6 Upon transition of VDDI from unpowered to powered, VO re-
H6 turns to the same state as VI in less than 1 µs.
X5 P
UP Undetermined Upon transition of VDDO from unpowered to powered, VO re-
turns to the same state as VI within 1 µs.
Note:
1. VDDI and VDDO are the input and output power supplies. VI and VO are the respective input and output terminals.
2. X = not applicable; H = Logic High; L = Logic Low; Hi-Z = High Impedance.
3. “Powered” state (P) is defined as 2.5 V < VDD < 5.5 V.
4. “Unpowered” state (UP) is defined as VDD = 0 V.
5. Note that an I/O can power the die for a given side through an internal diode if its source has adequate current.
6. See Ordering Guide for details. This is the selectable fail-safe operating mode (ordering option). Some devices have default out-
put state = H, and some have default output state = L, depending on the ordering part number (OPN). For default high devices,
the data channels have pull-ups on inputs/outputs. For default low devices, the data channels have pull-downs on inputs/outputs.
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Rev. 1.6 | 4
5 Page 
Parameter
Symbol
Test Condition
Min
Si8621Bx, Ex
VDD1
—
VDD2
—
Si8622Bx, Ex
VDD1
—
VDD2
—
100 Mbps Supply Current (All Inputs = 50 MHz Square Wave, CI = 15 pF on All Outputs)
Si8610Bx, Ex
VDD1
—
VDD2
—
Si8620Bx, Ex
VDD1
—
VDD2
—
Si8621Bx, Ex
VDD1
VDD2
Si8622Bx, Ex
VDD1
VDD2
Timing Characteristics
Si861x/2x Bx, Ex
Maximum Data Rate
Minimum Pulse Width
Propagation Delay
Pulse Width Distortion
|tPLH – tPHL|
Propagation Delay Skew3
Channel-Channel Skew
All Models
Output Rise Time
—
—
—
—
tPHL, tPLH
PWD
tPSK(P-P)
tPSK
See Figure 4.1 Propa-
gation Delay Timing on
page 12
See Figure 4.1 Propa-
gation Delay Timing on
page 12
CL = 15 pF
tr See Figure 4.1 Propa-
gation Delay Timing on
page 12
0
—
5.0
—
—
—
—
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Si861x/2x Data Sheet
Electrical Specifications
Typ Max Unit
2.2 3.3 mA
2.2 3.3
3.7 5.5 mA
4.4 6.7
1.2 2.0 mA
4.8 6.7
2.1 3.1 mA
8.9 12.5
5.8 8.1 mA
5.8 8.1
7.6 10.6 mA
8.2 11.4
— 150 Mbps
— 5.0 ns
8.0 13 ns
0.2 4.5 ns
2.0 4.5 ns
0.4 2.5 ns
2.5 4.0 ns
Rev. 1.6 | 10
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet SI8621.PDF ] | |
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