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PDF LPC2210 Data sheet ( Hoja de datos )
| Número de pieza | LPC2210 | |
| Descripción | (LPC2210 / LPC2220) 16/32-bit ARM microcontrollers | |
| Fabricantes | NXP Semiconductors | |
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LPC2210/2220
16/32-bit ARM microcontrollers; flashless with 64 kB,
with 10-bit ADC and external memory interface
Rev. 02 — 30 May 2005
Product data sheet
1. General description
The LPC2210/2220 microcontrollers are based on a 32/16 bit ARM7TDMI-S CPU with
real-time emulation and embedded trace support. For critical code size applications, the
alternative 16-bit Thumb mode reduces code by more than 30 % with minimal
performance penalty.
With a 144 pin package, low power consumption, various 32-bit timers, 8-channel 10-bit
ADC, PWM channels and up to nine external interrupt pins this microcontroller is
particularly suitable for industrial control, medical systems, access control and
point-of-sale. The LPC2210/2220 can provide up to 76 GPIOs depending on bus
configuration. With a wide range of serial communications interfaces, it is also very well
suited for communication gateways, protocol converters and embedded soft modems as
well as many other general-purpose applications.
2. Features
2.1 Key features
s 16/32-bit ARM7TDMI-S microcontroller in a LQFP144 and TFBGA144 package.
s 16/64 kB on-chip static RAM (LPC2210/2220).
s Serial boot-loader using UART0 provides in-system download and programming
capabilities.
s EmbeddedICE-RT and Embedded Trace interfaces offer real-time debugging with the
on-chip RealMonitor software as well as high speed real-time tracing of instruction
execution.
s Eight channel 10-bit A/D converter with conversion time as low as 2.44 µs.
s Two 32-bit timers (LPC2220 also external event counters) with four capture and four
compare channels, PWM unit (six outputs), Real-Time Clock (RTC) and watchdog.
s Multiple serial interfaces including two UARTs (16C550), Fast I2C-bus (400 kbit/s) and
two SPIs. On the LPC2220 a Synchronous Serial Port (SSP) with data buffers and
variable length transfers can be selected to replace one SPI.
s Vectored Interrupt Controller (VIC) with configurable priorities and vector addresses.
s Configurable external memory interface with up to four banks, each up to 16 MB and
8/16/32 bit data width.
s Up to 76 general purpose I/O pins (5 V tolerant). Up to nine edge or level sensitive
external interrupt pins available.
Free Datasheet http://www.datasheet-pdf.com/
1 page  
Table 3:
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Ball allocation
Row Column
1 2 3 4 5 6 7 8 9 10 11 12 13
A P2.22/
D22
VDDA(1V8) P1.28/
TDI
P2.21/
D21
P2.18/
D18
P2.14/
D14
P1.29/
TCK
P2.11/
D11
P2.10/
D10
P2.7/D7 VDD(3V3) VDD(1V8) P2.4/D4
B VDD(3V3) P1.27/
TDO
XTAL2
VSSA(PLL) P2.19/
D19
P2.15/
D15
P2.12/
D12
P0.20/
MAT1.3/
SSEL1/
EINT3
VDD(3V3)
P2.6/D6
VSS
P2.3/D3 VSS
C P0.21/
VSS
PWM5/
CAP1.3
XTAL1
VSSA
RESET
P2.16/
D16
P2.13/
D13
P0.19/
MAT1.2/
MOSI1/
CAP1.2
P2.9/D9
P2.5/D5
P2.2/D2
P2.1/D1
VDD(3V3)
D P0.24
P1.19/ P0.23
TRACEP
KT3
P0.22/
CAP0.0/
MAT0.0
P2.20/
D20
P2.17/
D17
VSS
P0.18/
CAP1.3/
MISO1/
MAT1.3
P2.8/D8
P1.30/
TMS
VSS
P1.20/
TRACES
YNC
P0.17/
CAP1.2/
SCK1/
MAT1.2
E P2.25/
D25
P2.24/
D24
P2.23
VSS
P0.16/
EINT0/
MAT0.2/
CAP0.2
P0.15/
RI1/
EINT2
P2.0/D0 P3.30/
BLS1
F P2.27/
P1.18/
VDDA(3V3) P2.26/
D27/
TRACEP
D26/
BOOT1 KT2
BOOT0
P3.31/
BLS0
P1.21/
VDD(3V3)
PIPESTAT
0
VSS
G P2.29/
D29
P2.28/
D28
P2.30/ P2.31/
D30/AIN4 D31/AIN5
P0.14/
DCD1/
EINT1
P1.0/CS0 VSS
P1.1/OE
H P0.25
n.c.
P0.27/
AIN0/
CAP0.1/
MAT0.1
P1.17/
TRACEP
KT1
P0.13/
DTR1/
MAT1.1
P1.22/ P3.2/A2
PIPESTAT
1
P3.1/A1
J P0.28/ VSS
AIN1/
CAP0.2/
MAT0.2
P3.29/
BLS2/
AIN6
P3.28/
BLS3/
AIN7
P3.3/A3
P1.23/ P0.11/
PIPESTAT CTS1/
2 CAP1.1
P0.12/
DSR1/
MAT1.0
K P3.27/WE P3.26/
CS1
VDD(3V3)
P3.22/
A22
P3.20/
A20
P0.1/
RXD0/
PWM3/
EINT0
P3.14/
A14
P1.25/ P3.11/
EXTIN0 A11
VDD(3V3)
P0.10/
RTS1/
CAP1.0
VSS
P3.4/A4
5 Page 
Philips Semiconductors
LPC2210/2220
16/32-bit ARM microcontrollers with external memory interface
Table 4: Pin description …continued
Symbol
Pin (LQFP) Pin (TFBGA) Type
P2.26/D26/
BOOT0
13 [5]
F4 [5]
I/O
I
P2.27/D27/
BOOT1
16 [5]
F1 [5]
I/O
I
P2.28/D28
P2.29/D29
P2.30/D30/
AIN4
17 [5]
18 [5]
19 [2]
P2.31/D31/
AIN5
20 [2]
P3.0 to P3.31
P3.0/A0
P3.1/A1
P3.2/A2
P3.3/A3
P3.4/A4
P3.5/A5
P3.6/A6
P3.7/A7
P3.8/A8
P3.9/A9
P3.10/A10
P3.11/A11
P3.12/A12
P3.13/A13
P3.14/A14
P3.15/A15
P3.16/A16
P3.17/A17
P3.18/A18
89 [5]
88 [5]
87 [5]
81 [5]
80 [5]
74 [5]
73 [5]
72 [5]
71 [5]
66 [5]
65 [5]
64 [5]
63 [5]
62 [5]
56 [5]
55 [5]
53 [5]
48 [5]
47 [5]
G2 [5]
G1 [5]
G3 [2]
G4 [2]
I/O
I/O
I/O
I
I/O
I
I/O
G12 [5]
H13 [5]
H12 [5]
J10 [5]
K13 [5]
M13 [5]
N13 [5]
M12 [5]
N12 [5]
M10 [5]
N10 [5]
K9 [5]
L9 [5]
M9 [5]
K7 [5]
L7 [5]
M7 [5]
N5 [5]
M5 [5]
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
Description
D26 — External memory data line 26.
BOOT0 — While RESET is LOW, together with BOOT1
controls booting and internal operation. Internal pull-up
ensures HIGH state if pin is left unconnected.
D27 — External memory data line 27.
BOOT1 — While RESET is LOW, together with BOOT0
controls booting and internal operation. Internal pull-up
ensures HIGH state if pin is left unconnected.
BOOT1:0 = 00 selects 8-bit memory on CS0 for boot.
BOOT1:0 = 01 selects 16-bit memory on CS0 for boot.
BOOT1:0 = 10 selects 32-bit memory on CS0 for boot.
BOOT1:0 = 11 selects 16-bit memory on CS0 for boot.
D28 — External memory data line 28.
D29 — External memory data line 29.
D30 — External memory data line 30.
AIN4 — A/D converter, input 4. This analog input is always
connected to its pin.
D31 — External memory data line 31.
AIN5 — A/D converter, input 5. This analog input is always
connected to its pin.
Port 3 — Port 3 is a 32-bit bidirectional I/O port with individual
direction controls for each bit. The operation of port 3 pins
depends upon the pin function selected via the Pin Connect
Block.
A0 — External memory address line 0.
A1 — External memory address line 1.
A2 — External memory address line 2.
A3 — External memory address line 3.
A4 — External memory address line 4.
A5 — External memory address line 5.
A6 — External memory address line 6.
A7 — External memory address line 7.
A8 — External memory address line 8.
A9 — External memory address line 9.
A10 — External memory address line 10.
A11 — External memory address line 11.
A12 — External memory address line 12.
A13 — External memory address line 13.
A14 — External memory address line 14.
A15 — External memory address line 15.
A16 — External memory address line 16.
A17 — External memory address line 17.
A18 — External memory address line 18.
9397 750 14061
Product data sheet
Rev. 02— 30 May 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
11 of 49
Free Datasheet http://www.datasheet-pdf.com/
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet LPC2210.PDF ] | |
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