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PDF SN3193 Data sheet ( Hoja de datos )
| Número de pieza | SN3193 | |
| Descripción | 3-Channel Fun LED Driver | |
| Fabricantes | SI-EN | |
| Logotipo |  |
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SN3193
3-Channel Fun LED Driver
Description
SN3193 is a 3-channel fun LED driver which features
two-dimensional auto breathing mode. It has One Shot
Programming mode and PWM Control mode for RGB
lighting effects. The maximum output current can be
adjusted in 5 levels (5mA~42mA).
In PWM Control mode, the PWM duty cycle of each
output can be independently programmed and controlled
in 256 steps to simplify color mixing. In One Shot
Programming mode, the timing characteristics for output
current - current rising, holding, falling and off time, can
be adjusted individually so that each output can
independently maintain a pre-established pattern
achieving mixing color breathing or a single color
breathing without requiring any additional interface
activity, thus saving valuable system resources.
SN3193 is available in DFN-10 (3mm × 3mm). It
operates from 2.7V to 5.5V over the temperature range of
-40°C to +85°C.
Features
z One group RGB, single color LED breathing
system-free pre-established pattern
z 3 independently controlled automatic and
semiautomatic breathing system-free pre-established
pattern
z I2C interface, automatic address increment function
z 3 independently controlled outputs of 256 PWM
steps
z 2.7V to 5.5V supply voltage
z 5 levels programmable output current
z Over-temperature protection
z Operating temperature TA = −40°C ~ 85°C
z DFN-10 (3mm × 3mm) package
Applications
z Mobile phones and other hand-held devices for LED
display
z LED in home appliances
Typical Application Circuit
Dec. 2010 P0.1
Figure 1 Typical Application Circuit
1
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Free Datasheet http://www.Datasheet-PDF.com/
1 page  
Detailed Description
I2C Interface
The SN3193 uses a serial bus, which conforms to the I2C
protocol, to control the chip’s functions with two wires:
SCL and SDA. The SN3193 has a 7-bit slave address
(A7:A1), followed by the R/W bit, A0. Since SN3193
only supports write operations, A0 must always be “0”.
The value of bits A1 and A2 are decided by the connection
of the AD pin.
The complete slave address is:
Table 1 Slave Address (Write only):
Bit
A7:A3
A2:A1
A0
Value
11010
AD
0
AD connected to GND, AD = 00;
AD connected to VDD, AD = 11;
AD connected to SCL, AD = 01;
AD connected to SDA, AD = 10;
The SCL line is uni-directional. The SDA line is
bi-directional (open-collector) with a pull-up resistor
(typically 4.7kΩ). The maximum clock frequency
specified by the I2C standard is 400kHz. In this
discussion, the master is the microcontroller and the slave
is the SN3193.
The timing diagram for the I2C is shown in Figure 2. The
SDA is latched in on the stable high level of the SCL.
When there is no interface activity, the SDA line should be
held high.
The “START” signal is generated by lowering the SDA
signal while the SCL signal is high. The start signal will
alert all devices attached to the I2C bus to check the
incoming address against their own chip address.
SN3193
The 8-bit chip address is sent next, most significant bit
first. Each address bit must be stable while the SCL level
is high.
After the last bit of the chip address is sent, the master
checks for the SN3193’s acknowledge. The master
releases the SDA line high (through a pull-up resistor).
Then the master sends an SCL pulse. If the SN3193 has
received the address correctly, then it holds the SDA line
low during the SCL pulse. If the SDA line is not low, then
the master should send a “STOP” signal (discussed later)
and abort the transfer.
Following acknowledge of SN3193, the register address
byte is sent, most significant bit first. SN3193 must
generate another acknowledge indicating that the
register address has been received.
Then 8-bit of data byte are sent next, most significant bit
first. Each data bit should be valid while the SCL level is
stable high. After the data byte is sent, the SN3193 must
generate another acknowledge to indicate that the data
was received.
The “STOP” signal ends the transfer. To signal “STOP”,
the SDA signal goes high while the SCL signal is high.
Address Auto Increment
To write multiple bytes of data into SN3193, load the
address of the data register that the first data byte is
intended for. During the SN3193 acknowledge of
receiving the data byte, the internal address pointer will
increment by one. The next data byte sent to SN3193 will
be placed in the new address, and so on (Figure 5).
SDA
SCL
Dec. 2010 P0.1
Figure 2 Interface Timing
DATA LINE STABLE;
DATA VALID
CHANGE OF DATA
ALLOWED
Figure 3 Bit Transfer
5
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Free Datasheet http://www.Datasheet-PDF.com/
5 Page 
Tape and Reel Information
SN3193
Dec. 2010 P0.1
11
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Free Datasheet http://www.Datasheet-PDF.com/
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet SN3193.PDF ] | |
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