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PDF RTL8188CUS-GR Data sheet ( Hoja de datos )

Número de pieza RTL8188CUS-GR
Descripción Single Chip IEEE 802.11b/g/n 1T1R WLAN Controller
Fabricantes Realtek 
Logotipo Realtek Logotipo



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ial fileesd toRTL8188CUS-GR
fident thorizSINGLE-CHIP IEEE 802.11b/g/n 1T1R WLAN
con au 54CONTROLLER WITH USB2.0 INTERFACE
t :(QFN-46)
altek cumen NULL 11:05DATASHEET
e o(CONFIDENTIAL: Development Partners Only)
R e d -06 Rev. 1.0
h 9 28 May 2010
T 0 Track ID: JATR-2265-11
0-Realtek Semiconductor Corp.
1No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
20Tel.: +886-3-578-0211. Fax: +886-3-577-6047
www.realtek.com
Free Datasheet http://www.datasheet4u.com/

1 page




RTL8188CUS-GR pdf
RTL8188CUS
Datasheet
1. General Description
The Realtek RTL8188CUS-GR is a highly integrated single-chip QFN-46 pin Wireless LAN (WLAN)
USB2.0 network interface controller compatible with the 802.11n specification. It combines a MAC, a
1T1R capable baseband, and RF in a single chip. The RTL8188CUS provides a complete solution for a
shigh throughput performance wireless client.
leThe RTL8188CUS baseband implements Orthogonal Frequency Division Multiplexing (OFDM) with 1
itransmit and 1 receive path and is compatible with the IEEE 802.11n specification. Features include one
f ospatial stream transmission, short guard interval (GI) of 400ns, spatial spreading, and transmission over
t20MHz and 40MHz bandwidth.
lFor legacy compatibility, Direct Sequence Spread Spectrum (DSSS), Complementary Code Keying (CCK)
a dand OFDM baseband processing are included to support all IEEE 802.11b and 802.11g data rates.
i eDifferential phase shift keying modulation schemes, DBPSK and DQPSK with data scrambling capability,
t zare available, and CCK provides support for legacy data rates, with long or short preamble. The high-speed
n iFFT/IFFT paths, combined with BPSK, QPSK, 16QAM, and 64QAM modulation of the individual
e rsubcarriers and rate compatible punctured convolutional coding with coding rate of 1/2, 2/3, 3/4, and 5/6,
provide higher data rates of 54Mbps and 150Mbps for IEEE 802.11g and 802.11n OFDM respectively.
id hoThe RTL8188CUS builds in an enhanced signal detector, an adaptive frequency domain equalizer, and a
f tsoft-decision Viterbi decoder to alleviate severe multi-path effects and mutual interference in the reception
n uof multiple streams. Robust interference detection and suppression are provided to protect against
o a 4Bluetooth, cordless phone, and microwave oven interference.
c t :5Efficient IQ-imbalance, DC offset, phase noise, frequency offset, and timing offset compensations are
k n L 5provided for the radio frequency front-end. Selectable digital transmit and receive FIR filters are provided
e e L 0to meet transmit spectrum mask requirements and to reject adjacent channel interference, respectively.
t m U :The RTL8188CUS supports fast receiver Automatic Gain Control (AGC) with synchronous and
l u N 1asynchronous control loops among antennas, antenna diversity functions, and adaptive transmit power
a c 1control function to obtain the better performance in the analog portions of the transceiver.
Re do 6The RTL8188CUS MAC supports 802.11e for multimedia applications, 802.11i for security, and 802.11n
0for enhanced MAC protocol efficiency. Using packet aggregation techniques such as A-MPDU with BA
and A-MSDU, protocol efficiency is significantly improved. Power saving mechanisms such as Legacy
e -Power Save, and U-APSD, and APSD, reduce the power wasted during idle time, and compensates for the
h 9extra power required to transmit OFDM. The RTL8188CUS provides simple legacy and 20MHz/40MHz
T 2010-0co-existence mechanisms to ensure backward and network compatibility.
Single-Chip IEEE 802.11b/g/n 1T1R WLAN Controller
with USB2.0 Interface (QFN-46)
1
Track ID: JATR-2265-11 Rev. 1.0
Free Datasheet http://www.datasheet4u.com/

5 Page





RTL8188CUS-GR arduino
RTL8188CUS
Datasheet
Symbol
Type Pin No Description
TX2G_ON[0]
O 3 RF TX0 Negative Signal
TX2G_OP[0]
O 4 RF TX0 Positive Signal
RX2G_IP[0]
RX2G_IN[0]
sANT_SEL_P/LED0
leANT_SEL_N/LED1
I 6 RF RX0 Positive Signal
I 7 RF RX0 Negative Signal
O 10 Antenna Control Positive Signal
Shared with LED0; can be selected by control register
O 11 Antenna Control Negative Signal
Shared with LED1; can be selected by control register
5.4. LED Interface ial fi ed toSymbol
t zLED0/ANT_SEL_P
en riLED1/ANT_SEL_N
id hoLED2/TRSWN[0]/GPIO8
Type
O
O
O
Table 4. LED Interface
Pin No Description
10 LED Pins (Active Low)
Shared with ANT_SEL_P; can be selected by control register
11 LED Pins (Active Low)
Shared with ANT_SEL_N; can be selected by control register
34 LED Pins (Active Low)
Shared with TRSWN[0] or GPIO8, can be selected by control register
5.5. CloeckkandcOotnhefr Piensnt aut LL 05:54Symbol
t m U :XI
l u N 1XO
a c 1CK_BT_40M
e oPDn
R e d -06GPIO0/WL_ACT
Th -09GPIO1/WL_RX
2010GPIO2/BT_STATE
Type
I
O
O
I
IO
IO
IO
Table 5. Clock and Other Pins
Pin No Description
16 40MHz OSC Input
Input of 40MHz Crystal Clock Reference
17 Output of 40MHz Crystal Clock Reference
18 Buffered 40M Clock Outputs for Other Peripheral IC
24 This Pin Can Externally Shutdown the RTL8191SE-VA1 (no requirement
for Extra Power Switch)
This pin can also support the WLAN Radio-off function with host interface
remaining connected.
20 General Purpose Input/Output Pin or Bluetooth Coexistence WL_ACT Pin
The WL_ACT signal indicates when the WLAN is either transmitting or
receiving in the 2.4GHz ISM band.
21 Trap Function: Weakly pull high at power on to turn on CK_BT_40M.
General Purpose Input/Output Pin or Bluetooth Coexistence WL_RX Pin
WL_RX is an indicator for wireless LAN RX activity.
22 General Purpose Input/Output Pin or Bluetooth Coexistence BT_STAT Pin
The BTSTAT signal indicates when normal Bluetooth packets are being
transmitted or received.
Single-Chip IEEE 802.11b/g/n 1T1R WLAN Controller
with USB2.0 Interface (QFN-46)
7
Track ID: JATR-2265-11 Rev. 1.0
Free Datasheet http://www.datasheet4u.com/

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