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PDF HFA5251 Data sheet ( Hoja de datos )
| Número de pieza | HFA5251 | |
| Descripción | 800MHz Monolithic Pin Driver | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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Data Sheet
HFA5251
September 1998 File Number 3689.4
800MHz Monolithic Pin Driver
The HFA5251 is a very high speed monolithic pin driver
solution for high performance test systems. The device will
switch at high data rates between two input voltage levels
providing variable amplitude pulses. The output impedance
is trimmed to achieve a precision 50Ω source for impedance
matching. Two differential ECL/TTL compatible inputs control
the operation of the HFA5251, one controlling the
VHIGH/VLOW switching and the other controlling the output’s
high-impedance state. The HFA5251’s 800MHz data rate
makes it compatible with today’s high-speed VLSI test
systems and the +7V to -2V output swing allows testing of all
common logic families.
The HFA5251 is manufactured in Intersil’s proprietary
complementary bipolar UHF-1 process. The HFA5251 is
offered in die form. Contact your local sales representative
for packaging options.
Functional Diagram
INPUT
BUFFER
VHIGH
DATA
DATA
HiZ
HiZ
-Q
+
Q
+
-
VLOW
INPUT
BUFFER
VCC2
50Ω
VOUT
VEE2
TRUTH TABLE FOR VOUT
DATA
01
HiZ
0 VLOW
VHIGH
1 HiZ
HiZ
Features
• High Digital Data Rate . . . . . . . . . . . . . . . . . . . . . 800MHz
• Very Fast Rise/Fall Times. . . . . . . . . . . . . . . . . . . . . 500ps
• Wide Output Range . . . . . . . . . . . . . . . . . . . . . +7V to -2V
• Precise 50Ω Output Impedance
• High Impedance, Three-State Output Control
Applications
• IC Tester Pin Electronics
• Pattern Generators
• Pulse Generators
• Level Comparator/Translator
Pinout
HFA5251 (DIE FORM)
DATA
DATA
HiZ
HiZ
VHIGH VCC1
VLOW VEE1
VCC2
VOUT
VEE2
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
1 page  
HFA5251
Application Information
The HFA5251 is a pin driver designed for use in automatic test
equipment (ATE) and high speed pulse generators. Pin drivers,
especially those with very high-speed performance, have
generally been implemented with discrete transistors
(sometimes GaAs) on a circuit board or in a hybrid. Recent IC
process improvements, specifically Intersil's UHF1 process [1],
have enabled the manufacturing of this 800MHz silicon
monolithic pin driver.
The ultra high speed performance of the HFA5251 is a result
of UHF1 process leverages: low parasitic collector-to-
substrate capacitance of the bonded wafer, low collector-to-
base parasitic capacitance of the self-aligned base/emitter
technology and ultra high fT NPN (8GHz) and PNP (5.5GHz)
poly-silicon transistors.
Functional Block Diagram
The HFA5251 functional block diagram is shown in Figure 1.
VHIGH
DATA
DATA
50Ω
VOUT
VLOW
HiZ
HiZ
FIGURE 1. BLOCK DIAGRAM
The control inputs, DATA and DATA, determine the output
level. If DATA is at logic “1” and DATA is at logic “0”, the
output level will be the same as VHIGH. If DATA is at logic “0”
and DATA is at logic “1”, the output will be the same as
VLOW. The control inputs, HiZ and HiZ, make the output
either active or high-impedance. If HiZ is at logic “1” and HiZ
is at logic “0”, the output will be in high impedance mode. If
HiZ is at logic “0” and HiZ is at logic “1”, the output will be
enabled. The output impedance in the enabled mode is
trimmed to 50Ω.
Circuit Schematic
The Pin Driver circuit consists of a switch, an output buffer,
and two differential control elements as shown in Figure 2.
A two stage approach, separating the switch from the output
buffer, allows the speed and accuracy requirements of the
switch to be de-coupled from the load driving capability of
the buffer.
The patent pending switch circuitry[2] uses cascaded emitter
followers as input buffers and also to switch the input VHIGH
and VLOW to node VSO. Dual differential pairs controlled by
the data timing (DATA and DATA) direct current to select
either the VHIGH or VLOW switch. Matching transistor types
and transdiodes improve linearity and lowers the voltage
offset and offset drift. Stacking two emitter-base junctions
allows the VHIGH to VLOW range to be extended to two
BVebo's of the process. The speed of the pin driver is largely
determined by the current flowing through the switch stage
and the collector-base capacitance of the output stage
transistors connected to the node VSO.
The output stage consists of cascaded emitter followers
constructed in a typical push-pull manner as shown in Figure
2. However, transdiodes are added to increase the voltage
breakdown characteristics of the output during high
impedance mode. HiZ and HiZ control the mode of the
output stage. A trimmed, NiCr resistor is added to provide
the 50Ω output impedance.
Overall, a symmetry of device types and paths is constructed
to improve slew and delay symmetry. Both the VHIGH to VOUT
path and the VLOW to VOUT path contain three NPN and
three PNP transistors operating at similar collector currents.
Thus the transient response of VHIGH to VLOW and VLOW to
VHIGH are kept symmetrical. Also, a trimmable current
reference (not shown) allows the AC parameters to be
adjusted to maintain unit to unit consistency.
Speed Advantage
Intersil Pin Drivers on bonded-wafer technology definitely
have a speed advantage, coming from the low collector-to-
substrate capacitance and the high fT of the transistors. In
addition, the patent-pending switching stage which fits
uniquely to Intersil's UHF1 process is another big contributor
for the high speed. This switching circuitry requires low series-
resistance NPN and PNP transdiodes available in UHF1. The
rise and fall times of the pin driver are largely determined by
the slew rate at the node VSO in Figure 2. The dominant
mechanism for the slew rate is the charging/discharging of the
collector-base capacitors of the transistors connected to the
node VSO. The charging/discharging currents are coming
from the switching stage current sources. The fast rise and fall
times are achieved because of the negligible collector-to-
substrate capacitance and the small base-collector
capacitance due to the self-aligned recessed oxide [1].
5
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