|
|
PDF MB85R4M2T Data sheet ( Hoja de datos )
| Número de pieza | MB85R4M2T | |
| Descripción | 4 M (256 K X 16) Bit | |
| Fabricantes | Fujitsu | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de MB85R4M2T (archivo pdf) en la parte inferior de esta página. Total 20 Páginas | ||
|
No Preview Available !
FUJITSU SEMICONDUCTOR
DATA SHEET
Memory FRAM
DS501-00024-0v01-E
4 M (256 K × 16) Bit
MB85R4M2T
DESCRIPTIONS
The MB85R4M2T is an FRAM (Ferroelectric Random Access Memory) chip consisting of 262,144 words
× 16 bits of nonvolatile memory cells fabricated using ferroelectric process and silicon gate CMOS process
technologies.
The MB85R4M2T is able to retain data without using a back-up battery, as is needed for SRAM.
The memory cells used in the MB85R4M2T can be used for 1013 read/write operations, which is a
significant improvement over the number of read and write operations supported by Flash memory and
E2PROM. The MB85R4M2T uses a pseudo-SRAM interface that is compatible with conventional
asynchronous SRAM.
FEATURES
• Bit configuration
• LB and UB data byte control
• Read/write endurance
• Data retention
• Operating power supply voltage
• Low power operation
: 262,144 words × 16 bits
: Available Configuration of 524,288 words × 8 bits
: 1013 times / 16 bits
: 10 years ( + 85 °C)
: 1.8 V to 3.6 V
: Operating power supply current 20 mA (Max)
Standby current 150 μA (Max)
Sleep current 20 μA (Max)
• Operation ambient temperature range : − 40 °C to + 85 °C
• Package
: 44-pin plastic TSOP (FPT-44P-M34)
RoHS compliant
Copyright©2013 FUJITSU SEMICONDUCTOR LIMITED All rights reserved
2013.11
1 page  
MB85R4M2T
State Transition Diagram
Power Up
Standby
/ZZ=H
/CE=L, /ZZ=H
/CE=H,/ZZ=H
RD/WR
Operation
/ZZ=L
Sleep
FUNCTIONAL TRUTH TABLE OF BYTE CONTROL
Operation Mode /WE /OE /LB /UB I/O0 to I/O7 I/O8 to I/O15
Read(Without Output)
H
H
H
×
×
H
×
H
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Read(I/O8 to I/O15)
HL
Hi-Z
Output
Read(I/O0 to I/O7)
HL LH
Output
Hi-Z
Read(I/O0 to I/O15)
LL
Output
Output
Write(I/O8 to I/O15)
HL
×
Input
Write(I/O0 to I/O7)
↑ ×LH
Input
×
Write(I/O0 to I/O15)
LL
Input
Input
Note: H= “H” level, L= “L” level, ↑= Rising edge, ↓= Falling edge, ×= H, L, ↓ or ↑
Hi-Z= High Impedance
In case the byte reading or writing are not selected, /LB and /UB pins shall be connected to GND pin.
DS501-00024-0v01-E
5
5 Page 
MB85R4M2T
TIMING DIAGRAMS
1. Read Cycle Timing 1 (Basic Timing)
tCA
A0 to A17
/ CE
/ OE
/ LB,/ UB
t AS
Val id Add ress
tAH
tCE
tOE
tBA
tOH
tPC
tHZ
tOHZ
tBHZ
I/ O0 to I/ O15
XXX : H or L
Val id Out put Da ta
2. Read Cycle Timing 2 (Address Access)
t
RC
A0 to A17
/ CE Low
/ OE
/ LB,/ UB
Val id Address
tAA
tOE
tBA
I/ O0 to I/ O15
t
AX
tOAH
XXX : H or L
Val id Out put Da ta
t
RC
Val id Address
tAA
tOH
tOHZ
Val id Out put Da ta
DS501-00024-0v01-E
11
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet MB85R4M2T.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| MB85R4M2T | 4 M (256 K X 16) Bit | Fujitsu |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |