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PDF MAX19710 Data sheet ( Hoja de datos )

Número de pieza MAX19710
Descripción Analog Front-End
Fabricantes Maxim Integrated 
Logotipo Maxim Integrated Logotipo




1. MAX19710






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19-0526; Rev 0; 5/06
EVAALVUAAILTAIOBNLEKIT
10-Bit, 7.5Msps, Full-Duplex
Analog Front-End
General Description
The MAX19710 is an ultra-low-power, highly integrated
mixed-signal analog front-end (AFE) ideal for wideband
communication applications operating in full-duplex (FD)
mode. Optimized for high dynamic performance and
ultra-low power, the device integrates a dual 10-bit,
7.5Msps receive (Rx) ADC; dual 10-bit, 7.5Msps transmit
(Tx) DAC; three fast-settling 12-bit aux-DAC channels for
ancillary RF front-end control; and a 10-bit, 333ksps
housekeeping aux-ADC. The typical operating power in
FD mode is 30mW at a 7.5MHz clock frequency.
The Rx ADCs feature 54.8dB SINAD and 79.8dBc SFDR
at 3.3MHz input frequency with a 7.5MHz clock frequen-
cy. The analog I/Q input amplifiers are fully differential
and accept 1.024VP-P full-scale signals. Typical I/Q
channel matching is ±0.01° phase and ±0.01dB gain.
The Tx DACs feature 73.8dBc SFDR at fOUT = 620kHz
and fCLK = 7.5MHz. The analog I-Q full-scale output volt-
age range is ±400mV differential. The output DC com-
mon-mode voltage is from 0.89V to 1.36V. The I/Q
channel offset is adjustable to optimize radio lineup side-
band/carrier suppression. Typical I-Q channel matching
is ±0.01dB gain and ±0.15° phase.
Two independent 10-bit parallel, high-speed digital
buses used by the Rx ADC and Tx DAC allow full-
duplex operation for frequency-division duplex applica-
tions. The Rx ADC and Tx DAC can be disabled
independently to optimize power management. A 3-wire
serial interface controls power-management modes, the
aux-DAC channels, and the aux-ADC channels.
The MAX19710 operates on a single 2.7V to 3.3V analog
supply and 1.8V to 3.3V digital I/O supply. The
MAX19710 is specified for the extended (-40°C to
+85°C) temperature range and is available in a 56-pin,
thin QFN package. The Selector Guide at the end of the
data sheet lists other pin-compatible versions in this AFE
family. For time-division duplex (TDD) applications, refer
to the MAX19705–MAX19708 AFE family of products.
Applications
Broadband Access
Radio
Private Mobile Radio
Portable Communication
Equipment
Ordering Information
PART*
PIN-PACKAGE
PKG CODE
MAX19710ETN
56 Thin QFN-EP**
T5677-1
MAX19710ETN+
56 Thin QFN-EP**
T5677-1
*All devices are specified over the -40°C to +85°C operating range.
**EP = Exposed paddle. +Denotes lead-free package.
Features
Dual 10-Bit, 7.5Msps Rx ADC and Dual 10-Bit,
7.5Msps Tx DAC
Ultra-Low Power
30mW at fCLK = 7.5MHz, FD Mode
21.3mW at fCLK = 7.5MHz, Slow Rx Mode
21.9mW at fCLK = 7.5MHz, Slow Tx Mode
Low-Current Standby and Shutdown Modes
Programmable Tx DAC Common-Mode DC Level
and I/Q Offset Trim
Excellent Dynamic Performance
SNR = 54.9dB at fIN = 3.3MHz (Rx ADC)
SFDR = 73.8dBc at fOUT = 620kHz (Tx DAC)
Three 12-Bit, 1μs Aux-DACs
10-Bit, 333ksps Aux-ADC with 4:1 Input Mux and
Data Averaging
Excellent Gain/Phase Match
±0.01° Phase, ±0.01dB Gain (Rx ADC) at
fIN = 1.8MHz
Multiplexed Parallel Digital I/O
Serial-Interface Control
Versatile Power-Control Circuits
Shutdown, Standby, Idle, Tx/Rx Disable
Miniature 56-Pin Thin QFN Package
(7mm x 7mm x 0.8mm)
TOP VIEW
Pin Configuration
42 41 40 39 38 37 36 35 34 33 32 31 30 29
ADC1 43
DAC3 44
DAC2 45
DAC1 46
VDD 47
IDN 48
IDP 49
GND 50
VDD 51
QDN 52
QDP 53
MAX19710
28 DA3
27 DA2
26 DA1
25 DA0
24 OVDD
23 OGND
22 AD9
21 AD8
20 AD7
19 AD6
18 AD5
REFIN 54
COM 55
REFN 56
EXPOSED PADDLE (GND)
17 AD4
16 AD3
15 AD2
1 2 3 4 5 6 7 8 9 10 11 12 13 14
THIN QFN
NOTE: THE PIN 1 INDICATOR IS “+” FOR LEAD-FREE DEVICES.
Functional Diagram and Selector Guide appear at end of
data sheet.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Free Datasheet http://www.datasheet4u.com/

1 page




MAX19710 pdf
10-Bit, 7.5Msps, Full-Duplex
Analog Front-End
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 3V, OVDD = 1.8V, internal reference (1.024V), CL 10pF on all digital outputs, fCLK = 7.5MHz (50% duty cycle), Rx ADC input
amplitude = -0.5dBFS, Tx DAC output amplitude = 0dBFS, CM1 = 0, CM0 = 0, differential Rx ADC input, differential Tx DAC output,
CREFP = CREFN = CCOM = 0.33µF, CL < 5pF on all aux-DAC outputs, TA = TMIN to TMAX, unless otherwise noted. Typical values are at
TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
Tx DAC DC ACCURACY
Resolution
N
Integral Nonlinearity
INL
Differential Nonlinearity
Residual DC Offset
Full-Scale Gain Error
DNL
VOS
Tx DAC DYNAMIC PERFORMANCE
DAC Conversion Rate
fCLK
In-Band Noise Density
ND
Third-Order Intermodulation
Distortion
IM3
Glitch Impulse
Spurious-Free Dynamic Range to
Nyquist
SFDR
CONDITIONS
Guaranteed monotonic (Note 2)
(Note 3)
fOUT = 620kHz
fOUT1 = 620kHz, fOUT2 = 640kHz
fOUT = 620kHz
MIN TYP MAX UNITS
10
-0.75
-4
-40
±0.3
±0.2
±1.2
±1.6
+0.75
+4
+40
Bits
LSB
LSB
mV
mV
-120
7.5 MHz
dBFS/Hz
-79 dBc
10 pVs
61 73.8
dBc
Total Harmonic Distortion to
Nyquist
THD
fOUT = 620kHz
Signal-to-Noise Ratio to Nyquist
SNR
fOUT = 620kHz
Tx DAC INTERCHANNEL CHARACTERISTICS
-72.2
55.1
-59.7
dBc
dB
I-to-Q Output Isolation
fOUTX,Y = 2MHz, fOUTY,X = 2.2MHz
92 dB
Gain Mismatch Between I and Q
Channels
Measured at DC
Phase Mismatch Between I and Q
Channels
fOUT = 620kHz
Differential Output Impedance
Tx DAC ANALOG OUTPUT
Full-Scale Output Voltage
VFS
Bits CM1 = 0, CM0 = 0 (default)
Output Common-Mode Voltage
VCOMD
Bits CM1 = 0, CM0 = 1
Bits CM1 = 1, CM0 = 0
Bits CM1 = 1, CM0 = 1
Rx ADC–Tx DAC INTERCHANNEL CHARACTERISTICS
Receive Transmit Isolation
AUXILIARY ADCs (ADC1, ADC2)
Resolution
ADC fINI = fINQ = 1.8MHz, DAC fOUTI =
fOUTQ = 620kHz
N
-0.4 ±0.01 +0.4
dB
±0.15
800
Degrees
Ω
1.29
1.14
0.96
0.78
±400
1.36
1.2
1.05
0.89
1.42
1.27
1.15
1.03
mV
V
92
10
dB
Bits
_______________________________________________________________________________________ 5
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MAX19710 arduino
10-Bit, 7.5Msps, Full-Duplex
Analog Front-End
Typical Operating Characteristics (continued)
(VDD = 3V, OVDD = 1.8V, internal reference (1.024V), CL 10pF on all digital outputs, fCLK = 7.5MHz (50% duty cycle), Rx ADC
input amplitude = -0.5dBFS, Tx DAC output amplitude = 0dBFS, CM1 = 0, CM0 = 0, differential Rx ADC input, differential Tx DAC
output, CREFP = CREFN = CCOM = 0.33µF, TA = +25°C, unless otherwise noted.)
Rx ADC SIGNAL-TO-NOISE AND DISTORTION
RATIO vs. ANALOG INPUT AMPLITUDE
60
fIN = 1.875MHz
55
50 QA
45
40
35 IA
30
25
20
-30
-25 -20 -15 -10 -5
ANALOG INPUT AMPLITUDE (dBFS)
0
Rx ADC TOTAL HARMONIC DISTORTION
vs. ANALOG INPUT AMPLITUDE
80
75 fIN = 1.875MHz
70 IA
65
60
55 QA
50
45
40
35
30
-30
-25 -20 -15 -10 -5
ANALOG INPUT AMPLITUDE (dBFS)
0
Rx ADC SPURIOUS-FREE DYNAMIC RANGE
vs. ANALOG INPUT AMPLITUDE
90
85 fIN = 1.875MHz
80
75
70 QA
65
60
55
50 IA
45
40
35
30
-30 -25 -20 -15 -10
-5
0
ANALOG INPUT AMPLITUDE (dBFS)
Rx ADC SIGNAL-TO-NOISE RATIO
vs. SAMPLING FREQUENCY
57.0
56.5 fIN = 1.875MHz
56.0 IA
55.5
55.0
54.5
54.0 QA
53.5
53.0
52.5
52.0
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5
SAMPLING FREQUENCY (MHz)
Rx ADC SPURIOUS-FREE DYNAMIC RANGE
vs. SAMPLING FREQUENCY
90
fIN = 1.875MHz
85
IA
80
75
70 QA
65
60
Rx ADC SIGNAL-TO-NOISE AND DISTORTION
RATIO vs. SAMPLING FREQUENCY
57.0
56.5 fIN = 1.875MHz
56.0 IA
55.5
55.0
54.5
54.0 QA
53.5
53.0
52.5
52.0
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5
SAMPLING FREQUENCY (MHz)
Rx ADC SIGNAL-TO-NOISE RATIO
vs. CLOCK DUTY CYCLE
58
fIN = 1.875MHz
57
56 IA
55
54 QA
53
Rx ADC TOTAL HARMONIC DISTORTION
vs. SAMPLING FREQUENCY
85
fIN = 1.875MHz
80
IA
75
70
QA
65
60
55
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5
SAMPLING FREQUENCY (MHz)
Rx ADC SIGNAL-TO-NOISE AND DISTORTION
RATIO vs. CLOCK DUTY CYCLE
58
fIN = 1.875MHz
57
56 IA
55
54 QA
53
55
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5
SAMPLING FREQUENCY (MHz)
52
35
40 45 50 55 60
CLOCK DUTY CYCLE (%)
65
52
35
40 45 50 55 60
CLOCK DUTY CYCLE (%)
65
______________________________________________________________________________________ 11
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