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PDF AS6C6264 Data sheet ( Hoja de datos )
| Número de pieza | AS6C6264 | |
| Descripción | 8K X 8 BIT LOW POWER CMOS SRAM | |
| Fabricantes | Alliance Semiconductor | |
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February 2007
AS6C6264
®
8K X 8 BIT LOW POWER CMOS SRAM
FEATURES
GENERAL DESCRIPTION
Access time :55ns
Low power consumption:
Operation current :
15mA (TYP.), VCC = 3.0V
Standby current :
1µ A (TYP.), VCC = 3.0V
Wide range power supply : 2.7 ~ 5.5V
Fully Compatible with all Competitors 5V product
Fully Compatible with all Competitors 3.3V product
Fully static operation
Tri-state output
Data retention voltage : 2.0V (MIN.)
All products ROHS Compliant
Package : 28-pin 600 mil PDIP
28-pin 330 mil SOP
28-pin 8mm x 13.4mm sTSOP
The AS6C6264 is a 65,536-bit low power CMOS
static random access memory organized as 8,192
words by 8 bits. It is fabricated using very high
performance, high reliability CMOS technology. Its
standby current is stable within the range of
operating temperature.
The AS6C6264 is well designed for low power
application, and particularly well suited for battery
back-up nonvolatile memory application.
The AS6C6264 operates with wide range power
supply.
FUNCTIONAL BLOCK DIAGRAM
Vcc
Vss
A0-A12
DECODER
8Kx8
MEMORY ARRAY
DQ0-DQ7
I/O DATA
CIRCUIT
CE#
CE2
WE#
OE#
CONTROL
CIRCUIT
COLUMN I/O
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PIN DESCRIPTION
SYMBOL
A0 - A12
DQ0 – DQ7
CE#, CE2
WE#
OE#
VCC
VSS
NC
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable Inputs
Write Enable Input
Output Enable Input
Power Supply
Ground
No Connection
02/Feb/07, v1.0
Alliance Memory Inc
Page 1 of 12
datasheet pdf - http://www.DataSheet4U.net/
1 page  
TIMING WAVEFORMS
READ CYCLE 1 (Address Controlled) (1,2)
Address
Dout
tRC
Previous Data Valid
tAA
®
8K X 8 BIT LOW POWER CMOS SRAM
tOH
Data Valid
READ CYCLE 2 (CE# and CE2 and OE# Controlled) (1,3,4,5)
Address
CE#
CE2
tRC
tAA
tACE
OE#
Dout
High-Z
tOLZ
tCLZ
tOE
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tOH
tOHZ
tCHZ
Data Valid
High-Z
Notes :
1.WE# is high for read cycle.
2.Device is continuously selected OE# = low, CE# = low., CE2 = high.
3.Address must be valid prior to or coincident with CE# = low, CE2 = high; otherwise tAA is the limiting parameter.
4.tCLZ, tOLZ, tCHZ and tOHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.
5.At any given temperature and voltage condition, tCHZ is less than tCLZ , tOHZ is less than tOLZ.
Page 5 of 12
datasheet pdf - http://www.DataSheet4U.net/
5 Page 
February 2007
ORDERING INFORMATION
AS6C6264
®
8K X 8 BIT LOW POWER CMOS SRAM
Ordering Codes
Alliance
Organization VCC range
Package
AS6C6264-55PCN 8k x 8
2.7-5.5V 28pin 600mil PDIP
AS6C6264-55SCN 8k x 8
2.7-5.5V 28pin 330mil SOP
AS6C6264-55SIN
8k x 8
2.7-5.5V 28pin 330mil SOP
AS6C6264-55STCN 8k x 8
2.7-5.5V 28pin sTSOP (8 x 13.4 mm)
AS6C6264-55STIN 8k x 8
2.7-5.5V 28pin sTSOP (8 x 13.4 mm)
Operating
Temp
Commercial ~
0º C to 70º C
Commercial ~
0º C to 70º C
Industrial ~
-40ºC to 85º C
Commercial ~
0º C to 70º C
Industrial ~
-40ºC to 85º C
Speed
ns
55
55
55
55
55
Part numbering system
AS6C 6264
- 55
X
http://www.DataSheet4U.net/
low
power Device
SRAM Number
prefix 6264
Package Options:
P = 28 pin 600 mil P-DIP
Access S = 28 pin 330 mil SOP
Time ST = 28 pin sTSOP (8mm x 13.4 mm)
XN
Temperature Range:
C = Commercial N = Lead
(0ºC to +70º C) Free ROHS
I = Industrial
Compliant
(-40º to +85º C)
Part
02/Feb/07, v1.0
Alliance Memory Inc
Page 11 of 12
datasheet pdf - http://www.DataSheet4U.net/
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet AS6C6264.PDF ] | |
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