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PDF AS6C62256 Data sheet ( Hoja de datos )

Número de pieza AS6C62256
Descripción 32K X 8 BIT LOW POWER CMOS SRAM
Fabricantes Alliance Semiconductor 
Logotipo Alliance Semiconductor Logotipo



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No Preview Available ! AS6C62256 Hoja de datos, Descripción, Manual

February 2007
AS6C62256
®
32K X 8 BIT LOW POWER CMOS SRAM
FEATURES
GENERAL DESCRIPTION
Access time : 55ns
Low power consumption:
Operation current :
15mA (TYP.), VCC = 3.0V
Standby current :
1µ A (TYP.), VCC = 3.0V
Wide range power supply : 2.7 ~ 5.5V
Fully Compatible with all Competitors 5V product
Fully Compatible with all Competitors 3.3V product
Fully static operation
Tri-state output
Data retention voltage : 2.0V (MIN.)
All products ROHS Compliant
Package : 28-pin 600 mil PDIP
28-pin 330 mil SOP
28-pin 8mm x 13.4mm sTSOP
The AS6C62256 is a 262,144-bit low power CMOS
static random access memory organized as 32,768
words by 8 bits. It is fabricated using very high
performance, high reliability CMOS technology. Its
standby current is stable within the range of
operating temperature.
The AS6C62256 is well designed for low power
application, and particularly well suited for battery
back-up nonvolatile memory application.
The AS6C62256 operates with wide range power
supply 2.7 ~ 5.5V
.
FUNCTIONAL BLOCK DIAGRAM
Vcc
Vss
A0-A14
DECODER
32Kx8
MEMORY ARRAY
DQ0-DQ7
I/O DATA
CIRCUIT
CE#
WE#
OE#
CONTROL
CIRCUIT
COLUMN I/O
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PIN DESCRIPTION
SYMBOL
A0 - A14
DQ0 – DQ7
CE#
WE#
OE#
VCC
VSS
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable Input
Write Enable Input
Output Enable Input
Power Supply
Ground
02/FEB/07, v1.0
Alliance Memory Inc.
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AS6C62256 pdf
February 2007
TIMING WAVEFORMS
READ CYCLE 1 (Address Controlled) (1,2)
Address
Dout
tRC
Previous Data Valid
tAA
AS6C62256
®
32K X 8 BIT LOW POWER CMOS SRAM
tOH
Data Valid
READ CYCLE 2 (CE# and OE# Controlled) (1,3,4,5)
Address
CE#
OE#
Dout
tRC
tAA
tACE
High-Z
tOLZ
tCLZ
tOE
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tOH
tOHZ
tCHZ
Data Valid
High-Z
Notes :
1.WE# is high for read cycle.
2.Device is continuously selected OE# = low, CE# = low.
3.Address must be valid prior to or coincident with CE# = low,; otherwise tAA is the limiting parameter.
4.tCLZ, tOLZ, tCHZ and tOHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.
5.At any given temperature and voltage condition, tCHZ is less than tCLZ , tOHZ is less than tOLZ.
02/FEB/07, v1.0
Alliance Memory Inc.
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AS6C62256 arduino
February 2007
AS6C62256
®
32K X 8 BIT LOW POWER CMOS SRAM
ORDERING INFORMATION
Ordering Codes
Alliance
Organization VCC range
Package
AS6C62256-55PCN 32k x 8
2.7-5.5V 28pin 600mil PDIP
AS6C62256-55SCN 32k x 8
2.7-5.5V 28pin 330mil SOP
AS6C62256-55SIN 32k x 8
2.7-5.5V 28pin 330mil SOP
AS6C62256-55STCN 32k x 8
2.7-5.5V 28pin sTSOP (8 x 13.4 mm)
AS6C62256-55STIN 32k x 8
2.7-5.5V 28pin sTSOP (8 x 13.4 mm)
Operating
Temp
Commercial ~
0º C to 70º C
Commercial ~
0º C to 70º C
Industrial ~
-40ºC to 85º C
Commercial ~
0º C to 70º C
Industrial ~
-40ºC to 85º C
Speed
ns
55
55
55
55
55
Part numbering system
AS6C 62256 - 55
X
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low Device
power Number
SRAM 62256
prefix
Package Options:
P = 28 pin 600 mil P-DIP
Access S = 28 pin 330 mil SOP
Time ST = 28 pin sTSOP (8mm x 13.4 mm)
XN
Temperature Range:
C = Commercial N = Lead
(0ºC to +70º C) Free ROHS
I = Industrial
Compliant
(-40º to +85º C)
Part
02/FEB/07, v1.0
Alliance Memory Inc.
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