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PDF AS6C1008 Data sheet ( Hoja de datos )

Número de pieza AS6C1008
Descripción 128K X 8 BIT LOW POWER CMOS SRAM
Fabricantes Alliance Semiconductor 
Logotipo Alliance Semiconductor Logotipo



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No Preview Available ! AS6C1008 Hoja de datos, Descripción, Manual

February 2007
®
128K X 8 BIT LOW POWER CMOS SRAM
AS6C1008
FEATURES
Access time :55ns
Low powe r consumption:
Operating current:10 mA (TYP.)
Standby current: 1 µA (TYP.)
Single 2.7V ~ 5.5V po we r supply
Fully Compatible with all Competitors 5V product
Fully Compatible with all Competitors 3.3V product
Fully s tatic operation
Tri-state output
Data retention voltage : 1.5V (MIN.)
All products are ROHS Compliant
Package : 32-pin 450 mil SOP
32-pin 600 mil P-DIP
32-pin 8mm x 20mm TSOP-I
32-pin 8mm x 13.4mm sTSOP
36-ball 6mm x 8mm TFBGA
GENERAL DESCRIPTION
The AS6C1008 is a 1,048,576 -bit low powe r
CMOS static random access me mory organized as
131,072 words by 8 bits . It is fabricated using ve ry
high performance, high reliability CMOS technolo gy. Its
sta ndby current is stable within the ra nge of
operating temperature.
The AS6C1008 is well designed for very low power
system applications, a nd particula rly well suited for
battery back-u p non-volatile memory a pplication.
The AS6C1008 operates from a single power supply
of 2.7V ~ 5.5V.
.
FUNCTIONAL BLOCK DIAGRAM
Vcc
Vss
A0-A16
DECODER
128Kx8
MEMORY ARRAY
DQ0-DQ7
I/O DATA
CIRCUIT
CE#
CE2
WE#
OE#
CONTROL
CIRCUIT
COLUMN I/O
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PIN DESCRIPTION
SYMBOL
A0 - A16
DQ0 – DQ7
CE#, CE2
WE#
OE#
VCC
V SS
NC
DESCRIPTION
Addres s Inputs
Da ta Inputs /Outputs
Chip Enable Inputs
Write Enable Input
Output Enable Input
Pow er Supply
G round
No C onnection
02/February/07, v 1.0
Alliance Memory Inc.
Page 1 of 14
datasheet pdf - http://www.DataSheet4U.net/

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AS6C1008 pdf
February 2007
®
128K X 8 BIT LOW POWER CMOS SRAM
TIMING WAVEFORMS
READ CYCLE 1 (Address Controlled) (1,2)
Address
Dout
tRC
Previous Data Valid
tAA
tOH
Data Valid
AS6C1008
READ CYCLE 2 (CE# and CE2 and OE# Controlled) (1,3,4,5)
Address
CE#
CE2
tRC
tAA
tACE
OE#
Dout
High-Z
tOLZ
tCLZ
tOE
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tOH
tOHZ
tCHZ
Data Valid
High-Z
Notes :
1.WE# is high for read cycle.
2.Device is continuously selected OE# = low, CE# = low., CE2 = high.
3.Address must be valid prior to or coincident with CE# = low, CE2 = high; otherwise tAA is the limiting parameter.
4.tCLZ, tOLZ, tCHZ and tOHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.
5.At any given temperature and voltage condition, tCHZ is less than tCLZ , tOHZ is less than tOLZ.
02/February/07, v 1.0
Alliance Memory Inc.
Page 5 of 14
datasheet pdf - http://www.DataSheet4U.net/

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AS6C1008 arduino
February 2007
®
128K X 8 BIT LOW POWER CMOS SRAM
32 pin 8mm x 13.4mm sTSOP Package Outline Dimension
HD
cL
12° (2x)
1 32
12° (2x)
AS6C1008
16 17
"A"
D
Seating Plane
y
12° (2X)
16
17
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GAUGE PLANE
0
SEATING PLANE
12° (2X)
"A" DETAIL VIEW
L
L1
1 32
SYM. UNIT INCH(BASE)
MM(REF)
A 0.049 (MAX) 1.25 (MAX)
A1 0.005 ±0.002 0.130 ±0.05
A2 0.039 ±0.002 1.00 ±0.05
b 0.008 ±0.01 0.20±0.025
c 0.005 (TYP) 0.127 (TYP)
D 0.465 ±0.004 11.80 ±0.10
E 0.315 ±0.004 8.00 ±0.10
e 0.020 (TYP) 0.50 (TYP)
HD 0.528±0.008 13.40 ±0.20.
L 0.0197 ±0.004 0.50 ±0.10
L1 0.0315 ±0.004 0.8 ±0.10
y 0.003 (MAX) 0.076 (MAX)
Θ 0o5o
0o5o
02/February/07, v 1.0
Alliance Memory Inc.
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datasheet pdf - http://www.DataSheet4U.net/

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