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PDF LT3954 Data sheet ( Hoja de datos )
| Número de pieza | LT3954 | |
| Descripción | 40V IN LED Converter | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de LT3954 (archivo pdf) en la parte inferior de esta página. Total 24 Páginas | ||
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FEATURES
n 3000:1 True Color PWM™ Dimming for LEDs
n Wide VIN Range: 4.5V to 40V
n Rail-to-Rail Current Sense Range: 0V to 40V
n Internal 40V/5A Switch
n Programmable PWM Dimming Signal Generator
n Constant Current (±3%) and Constant-Voltage
(±2%) Regulation
n Accurate Analog Dimming
n Drives LEDs in Boost, SEPIC, CUK, Buck Mode,
Buck-Boost Mode, or Flyback Configuration
n Output Short-Circuit Protected Boost
n Open LED Protection and Reporting
n Adjustable Switching Frequency: 100kHz to 1MHz
n Programmable VIN UVLO with Hysteresis
n C/10 Indication for Battery Chargers
n Low Shutdown Current: <1µA
n Thermally Enhanced 5mm × 6mm QFN Package
APPLICATIONS
n High Power LEDs
n Output Short-Circuit Protected Boost
n Battery and SuperCap Chargers
n Accurate Current Limited Voltage Regulators
LT3954
40VIN LED Converter with
Internal PWM Generator
DESCRIPTION
The LT®3954 is a DC/DC converter designed to operate as
a constant-current source and constant-voltage regulator.
It features an internal low side N-channel MOSFET rated
for 40V/5A. The LT3954 is ideally suited for driving high
current LEDs, but also has features to make it suitable
for charging batteries and supercapacitors. The fixed
frequency, current mode architecture results in stable
operation over a wide range of supply and output voltages.
A voltage feedback pin serves as the input for several
LED protection features, and also makes it possible for
the converter to operate as a constant-voltage source.
A frequency adjust pin allows the user to program the
frequency from 100kHz to 1MHz to optimize efficiency,
performance or external component size.
The LT3954 senses output current at the high side or at
the low side of the load. The internal PWM generator can
be configured to self-oscillate at fixed frequency with duty
ratio programmable from 4% to 96%. When driven by an
external signal, the PWM input provides LED dimminghttp://www.DataSheet4U.net/
ratios of up to 3000:1. The CTRL input provides additional
analog dimming capability.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
True Color PWM is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents including 7199560, 7321203.
TYPICAL APPLICATION
95% Efficiency 20W Boost LED Driver with Internal PWM Dimming
VIN
5V TO 30V
DIM
4.7µF
124k
22µH
499k
VIN
SW
4.7µF
×3
EN/UVLO
PGND
147k
1M
165k INTVCC
VREF
CTRL
LT3954
ISP
ISN
0.38Ω
100k
VMODE
DIM/SS
1M
FB
37.4k
PWM
SYNC
RT PWMOUT
10nF
28.7k
350kHz
VC GND GNDK INTVCC
5.1k INTVCC
47nF
300Hz
4.7nF
1µF
650mA
PWM Dimming Waveforms at
Various DIM Voltage Settings
20W LED STRING
(CURRENT DERATED
FOR VIN < 9V)
ILED
0.65A/DIV
3954 TA01a
VIN = 24V
VLED = 32V
0.5ms/DIV
VDIM = 8V
DCPWM = 97.2%
VDIM = 3.87V
DCPWM = 50%
VDIM = 1.47V
DCPWM = 10%
VDIM = 0V
DCPWM = 2.8%
3954 TA01b
NOTE: GND, GNDK AND SIGNAL LEVEL COMPONENTS MUST BE CONNECTED EXTERNALLY AS SHOWN.
AN INTERNAL CONNECTION BETWEEN GNDK AND PGND PINS PROVIDES GROUNDING TO THE SUPPLY
For more information www.linear.com/3954
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datasheet pdf - http://www.DataSheet4U.net/
1 page  
LT3954
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted.
vVs(ISCPT–RISLN)VTohltraegsehold
300
250
200
150
100
50
0
–50
0
0.5 1 1.5
CTRL VOLTAGE (V)
2
3954 G01
vVs(ISISP–PISVNo)lTtahgreeshold
260 CTRL = 2V
255
250
245
240
0
10 20 30
ISP VOLTAGE (V)
40
3954 G02
vVs(ISTPe–mISpNe) rTahturereshold
265 CTRL = 2V
260
ISN = 0V
255
250
ISP = 24V
245
240
–50 –25
0 25 50 75
TEMPERATURE (°C)
100 125
3954 G03
FB Regulation Voltage (VFB)
vs Temperature
1.270
1.265
1.260
1.255
1.250
1.245
1.240
–50 –25
0 25 50 75
TEMPERATURE (°C)
100 125
3954 G04
V(ISP–ISN) Threshold
vs FB Voltage
260
230
CTRL = 2V
200
170
140
http://www.DataSheet4U.net/
110
80
CTRL = 0.5V
50
20
1.22 1.225 1.23 1.235 1.24 1.245 1.25
FB (V)
3954 G05
VREF Source Current
vs Temperature
200
190
180
170
160
150
–50 –25
0 25 50 75
TEMPERATURE (°C)
100 125
3954 G06
VREF Voltage vs Temperature
2.05
2.04
2.03
2.02
2.01
2.00
1.99
–50 –25
0 25 50 75
TEMPERATURE (°C)
100 125
3954 G07
Switching Frequency vs RT
1000
900
800
700
600
500
400
300
200
100
10
RT (kΩ)
100
3954 G08
Switching Frequency
vs Temperature
420 RT = 25.5k
415
410
405
400
395
390
385
380
–50 –25
0 25 50 75
TEMPERATURE (°C)
100 125
3954 G09
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5 Page 
LT3954
OPERATION
The LT3954 is a constant-frequency, current mode con-
verter with a low side N-channel MOSFET switch. The
switch and PWMOUT pin drivers, and other chip loads,
are powered from INTVCC, which is an internally regulated
supply. In the discussion that follows it will be helpful to
refer to the Block Diagram of the IC. In normal operation
with the PWM pin low, the switch is turned off and the
PWMOUT pin is driven to GND, the VC pin is high imped-
ance to store the previous switching state on the external
compensation capacitor, and the ISP and ISN pin bias
currents are reduced to leakage levels. When the PWM pin
transitions high, the PWMOUT pin transitions high after a
short delay. At the same time, the internal oscillator wakes
up and generates a pulse to set the PWM latch, turning on
the internal power MOSFET switch. A voltage input propor-
tional to the switch current, sensed by an internal current
sense resistor is added to a stabilizing slope compensation
ramp and the resulting switch current sense signal is fed
into the negative terminal of the PWM comparator. The
current in the external inductor increases steadily during
the time the switch is on. When the switch current sense
voltage exceeds the output of the error amplifier, labeled
VC, the latch is reset and the switch is turned off. During
the switch-off phase, the inductor current decreases. At the
completion of each oscillator cycle, internal signals such
as slope compensation return to their starting points and
a new cycle begins with the set pulse from the oscillator.
Through this repetitive action, the PWM control algorithm
establishes a switch duty cycle to regulate a current or
voltage in the load. The VC signal is integrated over many
switching cycles and is an amplified version of the differ-
ence between the LED current sense voltage, measured
between ISP and ISN, and the target difference voltage
set by the CTRL pin. In this manner, the error amplifier
sets the correct peak switch current level to keep the
LED current in regulation. If the error amplifier output
increases, more current is demanded in the switch; if it
decreases, less current is demanded. The switch current
is monitored during the on-phase and is not allowed to
exceed the current limit threshold of 6.0A (typical). If the
SW pin exceeds the current limit threshold, the SR latch is
reset regardless of the output state of the PWM compara-
tor. The difference between ISP and ISN is monitored to
determine if the output is in a short-circuit condition. If
the difference between ISP and ISN is greater than 600mV
(typical), the SR latch will be reset regardless of the PWM
comparator. The DIM/SS pin will be pulled down and the
PWMOUT pin forced low and the SW pin turned off for
at least 4µs. These functions are intended to protect the
power switch as well as various external components in
the power path of the DC/DC converter.
In voltage feedback mode, the operation is similar to that
described above, except the voltage at the VC pin is set by
the amplified difference of the internal reference of 1.25V
and the FB pin. If FB is lower than the reference voltage,
the switch current will increase; if FB is higher than the
reference voltage, the switch demand current will decrease.
The LED current sense feedback interacts with the FB
voltage feedback so that FB will not exceed the internal
reference and the voltage between ISP and ISN will not
exceed the threshold set by the CTRL pin. For accurate
current or voltage regulation, it is necessary to be sure that
under normal operating conditions the appropriate loop is
dominant. To deactivate the voltage loop entirely, FB can
be connected to GND. To deactivate the LED current loophttp://www.DataSheet4U.net/
entirely, the ISP and ISN should be tied together and the
CTRL input tied to VREF.
Two LED specific functions featured on the LT3954 are
controlled by the voltage feedback pin. First, when the
FB pin exceeds a voltage 50mV lower (–4%) than the FB
regulation voltage, and the difference voltage between
ISP and ISN is below 25mV (typical), the pull-down driver
on the VMODE pin is activated. This function provides a
status indicator that the load may be disconnected and
the constant-voltage feedback loop is taking control of the
switching regulator. The VMODE pin de-asserts only when
PWM is high and FB drops below the voltage threshold. FB
overvoltage is the second protective function. When the
FB pin exceeds the FB regulation voltage by 60mV (plus
5% typical), the PWMOUT pin is driven low, ignoring the
state of the PWM input. In the case where the PWMOUT
pin drives a disconnect NFET, this action isolates the
LED load from GND, preventing excessive current from
damaging the LEDs.
For more information www.linear.com/3954
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11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet LT3954.PDF ] | |
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