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PDF LTC4151 Data sheet ( Hoja de datos )

Número de pieza LTC4151
Descripción High Voltage I2C Current and Voltage Monitor
Fabricantes Linear Technology 
Logotipo Linear Technology Logotipo



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No Preview Available ! LTC4151 Hoja de datos, Descripción, Manual

LTC4151/LTC4151-1
High Voltage I2C Current
and Voltage Monitor
FEATURES
n Wide Operating Voltage Range: 7V to 80V
n 12-Bit Resolution for Both Current and Voltages
n I2C Interface
n Additional ADC Input Monitors an External Voltage
n Continuous Scan and Snapshot Modes
n Shutdown Mode (LTC4151) Reduces Quiescent
Current to 120μA
n Split SDA for Optoisolation (LTC4151-1)
n Tiny 10-Lead MSOP and 3mm × 3mm DFN Packages
APPLICATIONS
n Telecom Infrastructure
n Automotive
n Industrial
n Consumer
DESCRIPTION
The LTC®4151 and LTC4151-1 are high side power
monitors that operate over a wide voltage range of 7V to
80V. In default operation mode, the onboard 12-bit ADC
continuously measures high side current, input voltage
and an external voltage. Data is reported through the I2C
interface when polled by a host. The monitors can also
perform on-demand measurement in a snapshot mode.
The LTC4151 features a dedicated shutdown pin to reduce
power consumption. The LTC4151-1 features split I2C
data pins with data in and an inverted data output to drive
optoisolators.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
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VIN
7V to 80V
High Side Power Sensing with Onboard ADC and I2C
0.02Ω
SENSE+ SENSE
VIN
ADR1
ADR0
LTC4151
SHDN
SCL
SDA
ADIN
GND
VOUT
2k 2k
MEASURED
VOLTAGE
3.3V
VDD
μCONTROLLER
SCL
SDA
41511 TA01
12-Bit ADC DNL and INL
1.0
0.5
0
–0.5
–1.0
0
1.0
1024
2048
CODE
3072
4096
41511 TA01b
0.5
0
–0.5
–1.0
0
1024
2048
CODE
3072
4096
41511 TA01c
41511fa
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LTC4151 pdf
LTC4151/LTC4151-1
TYPICAL PERFORMANCE CHARACTERISTICS VIN = 12V, TA = 25°C, unless noted.
Supply Current vs Supply Voltage
(Normal Mode)
1.30
Supply Current vs Supply Voltage
(Shutdown Mode)
400
1.15 – 40°C
25°C
1.00 85°C
0.85
300
– 40°C
200 25°C
85°C
100
0.70
0
20 40 60
SUPPLY VOLTAGE (V)
80
41511 G01
0
0 20 40 60 80
SUPPLY VOLTAGE (V)
41511 G02
ADC Total Unadjusted Error
vs Code (ADIN Voltage)
0.10
ADC DNL vs Code (ADIN Voltage)
1.0
ADC INL vs Code (ADIN Voltage)
1.0
0.05
0
0.5
0
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0.5
0
–0.05
–0.5
–0.5
–0.10
0
1024
2048
CODE
3072
4096
41511 G03
ADC Total Unadjusted Error
vs Code (SENSE Voltage)
1.0
–1.0
0
1024
2048
CODE
3072
4096
41511 G04
ADC DNL vs Code (SENSE Voltage)
2
–1.0
0
1024
2048
CODE
3072
4096
41511 G05
ADC INL vs Code (SENSE Voltage)
2
0.5 1 1
000
–0.5 –1 –1
–1.0
0
1024
2048
CODE
3072
4096
41511 G06
–2
0
1024
2048
CODE
3072
4096
41511 G07
–2
0
1024
2048
CODE
3072
4096
41511 G08
41511fa
5
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LTC4151 arduino
LTC4151/LTC4151-1
APPLICATIONS INFORMATION
Acknowledge
The acknowledge signal is used for handshaking between
the transmitter and the receiver to indicate that the last
byte of data was received. The transmitter always releases
the SDA line during the acknowledge clock pulse. The
LTC4151/LTC4151-1 pull the SDA line low on the 9th clock
cycle to acknowledge receipt of the data. If the slave fails
to acknowledge by leaving SDA high, then the master can
abort the transmission by generating a Stop condition.
When the master is receiving data from the slave, the
master must pull down the SDA line during the clock pulse
to indicate receipt of a data byte, and that another byte is
to be read. After the last byte has been received the master
will leave the SDA line high (not acknowledge) and issue
a Stop condition to terminate the transmission.
Write Protocol
The master begins a write operation with a Start condi-
tion followed by the seven bit slave address and the R/W
bit set to zero. After the addressed LTC4151/LTC4151-1
acknowledge the address byte, the master then sends a
command byte which indicates which internal register
the master wishes to write. The LTC4151/LTC4151-1
acknowledge this and then latches the lower three bits of
the command byte into its internal register address pointer.
The master then delivers the data byte and the LTC4151 or
LTC4151-1 acknowledges once more and latches the data
into its internal register. If the master continues sending a
second byte or more data bytes, as in a Write Word or Write
Page command, the second byte or more data bytes will
be acknowledged by the LTC4151/LTC4151-1, the internal
register address pointer will increment automatically, and
each byte of data will be latched into an internal register
corresponding to the address pointer. The write operation
terminates and the register address pointer resets to 00h
when the master sends a Stop condition.
Read Protocol
The master begins a read operation with a Start condition
followed by the seven bit slave address and the R/W bit set to
zero. After the addressed LTC4151/LTC4151-1 acknowledge
the address byte, the master then sends a command byte
that indicates which internal register the master wishes to
read. The LTC4151/LTC4151-1 acknowledge this and then
latches the lower three bits of the command byte into its
internal register address pointer. The master then sends
a repeated Start condition followed by the same seven bit
address with the R/W bit now set to one. The LTC4151/
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LTC4151-1 acknowledge and send the contents of the
requested register. The transmission terminates when the
master sends a Stop condition. If the master acknowledges
the transmitted data byte, as in a Read Word command,
the LTC4151/LTC4151-1 will send the contents of the next
register. If the master acknowledges the second data byte
Table 1. LTC4151/LTC4151-1 Device Addressing*
DESCRIPTION
HEX DEVICE
ADDRESS
h a6 a5
Mass Write CC 1 1
0 CE 1 1
1 D0 1 1
2 D2 1 1
3 D4 1 1
4 D6 1 1
5 D8 1 1
6 DA 1 1
7 DC 1 1
8 DE 1 1
*H = Tie High; L = Tie to GND; NC = Open; X = Don’t Care
BINARY DEVICE ADDRESS
a4 a3 a2 a1
0011
0011
0100
0100
0101
0101
0110
0110
0111
0111
LTC4151/LTC4151-1
ADDRESS PINS
a0 R/W ADR1 ADR0
00 X X
1X
H
L
0 X NC H
1X H H
0 X NC NC
1 X NC
L
0X L H
1 X H NC
0 X L NC
1X
L
L
41511fa
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