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PDF PSMN1R5-30YL Data sheet ( Hoja de datos )
| Número de pieza | PSMN1R5-30YL | |
| Descripción | N-channel MOSFET | |
| Fabricantes | NXP Semiconductors | |
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PSMN1R5-30YL
N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
Rev. 01 — 9 April 2010
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel MOSFET in LFPAK package qualified to 175 °C. This product is
designed and qualified for use in a wide range of industrial, communications and domestic
equipment.
1.2 Features and benefits
Advanced TrenchMOS provides low
RDSon and low gate charge
High efficiency gains in switching
power convertors
Improved mechanical and thermal
characteristics
LFPAK provides maximum power
density in a Power SO8 package
1.3 Applications
DC-to-DC converters
Lithium-ion battery protection
Load switching
Motor control
Server power supplies
1.4 Quick reference data
Table 1. Quick reference data
Symbol Parameter
Conditions
VDS
drain-source
Tj ≥ 25 °C; Tj ≤ 175 °C
voltage
ID
drain current
Tmb = 25 °C; VGS = 10 V; see [1]
Figure 1
Ptot
total power
Tmb = 25 °C; see Figure 2
dissipation
Tj junction
temperature
Static characteristics
RDSon
drain-source
on-state
resistance
Dynamic characteristics
VGS = 10 V; ID = 15 A;
Tj = 100 °C; see Figure 14
VGS = 10 V; ID = 15 A;
Tj = 25 °C
QGD
gate-drain charge VGS = 4.5 V; ID = 10 A;
VDS = 12 V; see Figure 15; see
Figure 16
Min Typ Max Unit
- - 30 V
- - 100 A
- - 109 W
-55 -
175 °C
- - 2.4 mΩ
- 1.3 1.5 mΩ
- 8.7 - nC
Datasheet
pd
1 page  
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NXP Semiconductors
104
ID
(A)
103
102
10
1
10-1
Limit RDSon = VDS / ID
(1)
1
PSMN1R5-30YL
N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
003aad111
10 μs
DC
10
100 μs
1 ms
10 ms
100 ms
VDS (V)
102
Fig 4. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
5. Thermal characteristics
Table 5.
Symbol
Rth(j-mb)
Thermal characteristics
Parameter
thermal resistance
from junction to
mounting base
Conditions
see Figure 5
Min Typ Max Unit
- 0.5 1.1 K/W
10
Zth(j-mb)
(K/W)
003aac456
1
δ = 0.5
0.2
10-1 0.1
0.05
0.02
P δ = tp
T
10-2
single shot
tp
T
t
10-3
10-6
10-5
10-4
10-3
10-2
10-1 tp (s) 1
Fig 5. Transient thermal impedance from junction to mounting base as a function of pulse duration
PSMN1R5-30YL
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 9 April 2010
© NXP B.V. 2010. All rights reserved.
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NXP Semiconductors
PSMN1R5-30YL
N-channel 30 V 1.5 mΩ logic level MOSFET in LFPAK
7. Package outline
Plastic single-ended surface-mounted package (LFPAK); 4 leads
SOT669
L1
HD
E
A
A2
C
b2 c2
mounting
base
D1
L2
1 2 34
e b wM A
1/2 e
X
c
E1
b3
b4
A
A1 C
detail X
(A3)
θ
L
yC
0 2.5 5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT A
A1 A2 A3
b
b2 b3 b4
c
c2
D (1)
D1(1)
max
E(1)
E1(1)
e
H
L L1
mm 1.20 0.15 1.10 0.25 0.50 4.41 2.2 0.9 0.25 0.30 4.10 4.20 5.0 3.3 1.27 6.2 0.85 1.3
1.01 0.00 0.95
0.35 3.62 2.0 0.7 0.19 0.24 3.80
4.8 3.1
5.8 0.40 0.8
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
L2 w y
1.3 0.25 0.1
0.8
θ
8°
0°
OUTLINE
VERSION
IEC
REFERENCES
JEDEC
JEITA
SOT669
MO-235
EUROPEAN
PROJECTION
ISSUE DATE
04-10-13
06-03-16
Fig 19. Package outline SOT669 (LFPAK)
PSMN1R5-30YL
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 9 April 2010
© NXP B.V. 2010. All rights reserved.
11 of 15
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