PDF MX23L6430 Data sheet ( Hoja de datos )

Número de pieza	MX23L6430
Descripción	64M-Bit Synchronous Mask ROM
Fabricantes	MACRONIX INTERNATIONAL
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No Preview Available ! www.DataSheet.co.kr INDEX PRELIMINARY MX23L6430 64M-Bit Synchronous Mask ROM FEATURES • Switchable organization : 4M x 16 ( word mode ) or 2M x 32 ( double word mode ) • Power supply 3.0V ~ 3.6V • TTL compatible with multiplexed address • All inputs are sampled at rising edge of system clock • Read performance : - 4-1-1-1@33MHz(RAS Latency=1, CAS Latency=3 ) - 5-1-1-1@50MHz(RAS Latency=1, CAS Latency=4 ) - 7-1-1-1@66MHz(RAS Latency=2, CAS Latency=5 ) - 7-1-1-1@100MHz(RAS Latency=2, CAS Latency=5) - Clock to valid output delay (tSAC) : 6ns(Max.) • MRS cycle with address key programs : - RAS Latency : 1 & 2 - CAS Latency : 2 ~ 8 - Burst Length : 8 double word - Burst Type : Sequential or Interleaved • DQM for data-out masking • Package : 86 pin TSOP(II) GENERAL DESCRIPTION The 64M synch. MROM is a synchronous high band- width mask programmable ROM with MXIC's high per- formance CMOS process technology and is organized either as 4M x 16 bits or 2M x 32 bits depending on polarity of WORD pin. Synchronous design allows pre- cise cycle control , with the use of system clock, I/O transaction are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system application. PIN CONFIGURATION VCC Q0 VCCQ Q16 Q1 VSSQ Q17 Q2 VCCQ Q18 Q3 VSSQ Q19 MR VCC DQM NC CAS RAS CS WORD A12 A11 A10 A0 A1 A2 NC VCC NC Q4 VSSQ Q20 Q5 VCCQ Q21 Q6 VSSQ Q22 Q7 VCCQ Q23 VCC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 MX23L6430 86 VSS 85 Q31 84 VSSQ 83 Q15 82 Q30 81 VCCQ 80 Q14 79 Q29 78 VSSQ 77 Q13 76 Q28 75 VCCQ 74 Q12 73 NC 72 VSS 71 NC 70 NC 69 NC 68 CLK 67 CKE 66 A9 65 A8 64 A7 63 A6 62 A5 61 A4 60 A3 59 NC 58 VSS 57 NC 56 Q27 55 VCCQ 54 Q11 53 Q26 52 VSSQ 51 Q10 50 Q25 49 VCCQ 48 Q9 47 Q24 46 VSSQ 45 Q8 44 VSS P/N:PM0575 REV. 1.1, FEB. 09, 1999 1 Datasheet pdf - http://www.DataSheet4U.net/ 1 page www.DataSheet.co.kr INDEX *LVTTL: Output 850 ohms 3.3V 1200 ohms 50pF Output MX23L6430 Z0=50 ohms 1.4V 50 ohms 50pF (1) DC Output Load Circuit (2) AC Output Load Circuit CAPACITANCE PARAMETER Input Capacitance Output capacitance SYMBOL Cin Cout MIN. - - MAX. 5 7 UNIT pF pF P/N:PM0575 REV. 1.1, FEB. 09, 1999 5 Datasheet pdf - http://www.DataSheet4U.net/ 5 Page www.DataSheet.co.kr INDEX MX23L6430 READ CYCLE 3: Consecutive Column Access @RAS Latency=2, CAS Latency=5, 100MHz 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 CLK VIH CKE CS RAS CAS Addr RAa Data Data MR CAa BL=4 tCCD BL=8 CAb CAc CAd Qa0 Qa1 Qa2 Qa3 Qb0 Qb1 Qb2 Qb3 Qc0 Qc1 Qc2 Qa0 Qa1 Qa2 Qa3 Qb0 Qb1 Qb2 Qb3 Qc0 Qc1 Qc2 WORD P/N:PM0575 11 REV. 1.1, FEB. 09, 1999 Datasheet pdf - http://www.DataSheet4U.net/ 11 Page

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Número de pieza	Descripción	Fabricantes
MX23L6430	64M-Bit Synchronous Mask ROM	MACRONIX INTERNATIONAL

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