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PDF LK645D3LZ2U Data sheet ( Hoja de datos )

Número de pieza LK645D3LZ2U
Descripción Display Module
Fabricantes Sharp 
Logotipo Sharp Logotipo



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LK645D3LZ2U LCD Module
Technical Document
LK645D3LZ2U
LCD Group
Portrait Mode, HD1080, TFT
Large LCD Module
Product Specifications
30 March 2007
This Large TFT module is composed of a color
TFT-LCD panel, driver ICs, control circuitry,
power supply circuitry, inverter circuitry,
and backlight system. It displays graphics and
text on a 1,080 × RGB × 1,920 dots panel with
16,777,216 colors by using an LVDS (Low
Voltage Differential Signaling) interface. This
module also includes the DC/AC inverter to drive
the CCFT. This module incorporates Sharp’s
Overshoot drive (O/S drive) technology to
improve the LCD response time. Sharp’s O/S
drive technology utilizes frame comparison to
continuously adjust the drive signals applied to
the Liquid Crystal on a frame-by-frame basis. As
a result, there is very little of the image blur often
associated with LCD technology, and a clear
image is seen in every frame.
www.SHARPsma.com
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LK645D3LZ2U pdf
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LD- 19361-2
4. Input Terminals
4-1. TFT panel driving
CN1 (Interface signals) (Shown in Fig.1-2)
Using connector
: FI-RE41S-HF (Japan Aviation Electronics Ind. , Ltd.)
Mating connector
: FI-RE41HL,FI-R41H (Japan Aviation Electronics Ind. , Ltd.)
Mating LVDS transmitter
:THC63LVDM83R(THine) or equivalent device
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
Symbol
GND
AIN0-
AIN0+
AIN1-
AIN1+
AIN2-
AIN2+
GND
ACK-
ACK+
AIN3-
AIN3+
NC
NC
GND
BIN0-
BIN0+
BIN1-
BIN1+
BIN2-
BIN2+
GND
BCK-
BCK+
BIN3-
BIN3+
NC
NC
GND
SELLVDS
U/D
R/L
VBRT
Frame1
Reserved
TEMP3
TEMP2
TEMP1
VON
O/Sset
NC
Function
GND
Aport (-)LVDS CH0 differential data input
Aport (+)LVDS CH0 differential data input
Aport (-)LVDS CH1 differential data input
Aport (+)LVDS CH1 differential data input
Aport (-)LVDS CH2 differential data input
Aport (+)LVDS CH2 differential data input
GND
Aport LVDS Clock signal(-)
Aport LVDS Clock signal(+)
Aport (-)LVDS CH3 differential data input
Aport (+)LVDS CH3 differential data input
It is required to set non-connection (OPEN)
It is required to set non-connection (OPEN)
GND
Bport (-)LVDS CH0 differential data input
Bport (+)LVDS CH0 differential data input
Bport (-)LVDS CH1 differential data input
Bport (+)LVDS CH1 differential data input
Bport (-)LVDS CH2 differential data input
Bport (+)LVDS CH2 differential data input
GND
Bport LVDS Clock signal(-)
Bport LVDS Clock signal(+)
Bport (-)LVDS CH3 differential data input
Bport (+)LVDS CH3 differential data input
It is required to set non-connection (OPEN)
It is required to set non-connection (OPEN)
GND
Select LVDS data order [Note 1]
Vertical shift direction[Note 2]
Horizontal shift direction [Note 2]
Inverter Brightness Control (Analog Voltage:0-3.3V)
Frame frequency setting H:60Hz, L:50Hz
It is required to set non-connection (OPEN)
Data3 of panel surface temperature [Note3]
Data2 of panel surface temperature [Note3]
Data1 of panel surface temperature [Note3]
Inverter ON/OFF setting H:ON, L:OFF [Note 4]
O/S operation setting H:O/S_ON, L:O/S_OFF
It is required to set non-connection (OPEN)
Remark
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
10kΩ Pull up :3.3V
10kΩ Pull Down :GND
10kΩ Pull Down :GND
[Note 4]
10kΩ Pull Down :GND
10kΩ Pull Down :GND
10kΩ Pull Down :GND
10kΩ Pull Down :GND
10kΩ Pull Down :GND
10kΩ Pull Down :GND
[note] GND of a liquid crystal panel drive part has connected with a module chassis.
[note] L,”0”: Low level voltage (GND) H,”1”: High level voltage(3.3V)
[note]In case of O/S set setting ”0”(O/S_OFF), it should be set the Temp1~3 to “0”.
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LD- 19361-8
[Note 4]
Pin No.
Symbol
Function
Remark
39 VON
Inverter ONOFF
[Note A]
33 VBRT
Brightness Control
[Note B]
*GND of an inverter board is connected to GND of a module chassis and a liquid crystal panel drive part.
[Note A] Inverter ON/OFF
Input voltage
3.3V
0V
Function
Inverter: ON
Inverter: OFF
[Note B] Brightness Control
PWM Brightness Control is regulated by analog input voltage (0V to 3.3V) .
Input voltage
0V
3.3V
4-2. Backlight driving
Function
Brightness Control : (Dark :20%)
Brightness Control : (Bright: 100%)
CN3, CN4, CN5, CN6, CN7, CN8, CN9, CN10 (Inverter Power input Pin layout)
Using connector: B10B-PH-K-S(LF)( J.S.T. Mfg Co.,Ltd.)
Mating connector: PHR-10(J.S.T. Mfg Co.,Ltd.)
Pin No.
1
2
3
4
5
6
7
8
9
10
Symbol
VINV
VINV
VINV
VINV
VINV
GND
GND
GND
GND
GND
Function
24V
24V
24V
24V
24V
GND
GND
GND
GND
GND
*GND of an inverter board is connected to GND of a module chassis and a liquid crystal panel drive part.
4-3. The back light system characteristics
The back light system is direct type with 64 CCFTs (Cold Cathode Fluorescent Tube).
The characteristics of the lamp are shown in the following table.
The value mentioned below is at the case of one CCFT.
Item Symbol Min.
Typ.
Max.
Unit Remarks
Life time
TL
-
(60000)
-
Hour
[Note]
[Note]Lamp life time is defined as the time when brightness becomes 50% of the original value
in the continuous operation under the condition of Ta=25 and brightness control(VBRT=3.3V).
Above value is applicable when the long side of LCD module is placed vertically
(Portrait position).
(Lamp lifetime may vary if LCD module is in landscape position due to the change of
mercury density inside the lamp.)
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