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PDF ISL78210 Data sheet ( Hoja de datos )

Número de pieza ISL78210
Descripción Automotive PWM DC/DC Voltage Controller
Fabricantes Intersil Corporation 
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Automotive PWM DC/DC Voltage Controller
ISL78210
The ISL78210 IC is a Single-Phase Synchronous-Buck
PWM voltage controller featuring Intersil’s Robust Ripple
Regulator (R3™) Technology. The ISL78210 provides a
low cost solution for compact high performance
applications.The wide 3.3V to 25V input voltage range is
ideal for systems that run on battery or AC adapter
power sources. Resistor programmed output voltage
setpoint and capacitor programmed soft-start delay allow
for fast and easy implementation. Robust integrated
MOSFET drivers and Schottky bootstrap diode reduce the
implementation area and lower component cost.
Intersil’s R3 Technology™ combines the best features of
both fixed-frequency and hysteretic PWM control. The
PWM frequency is 300kHz during static operation,
becoming variable during changes in load, setpoint
voltage, and input voltage when changing between
battery and AC adapter power. The modulators ability to
change the PWM switching frequency during these
events in conjunction with external loop compensation
produces superior transient response. For maximum
efficiency, the converter automatically enters
diode-emulation mode (DEM) during light-load conditions
such as system standby.
Pin Configuration
ISL78210
(16 LD 2.6X1.8 µTQFN)
TOP VIEW
GND 1
EN 2
NC 3
SREF 4
12 BOOT
11 UGATE
10 PHASE
9 OCSET
Features
• Input Voltage Range: 3.3V to 25V
• Output Voltage Range: 0.5V to 3.3V
• Output Load to 30A
• Simple Resistor Programming for Output Voltage
• ±0.75% System Accuracy: -40°C to +105°C
• Capacitor Programming for Soft-Start Delay
• Fixed 300kHz PWM Frequency in Continuous
Conduction
• External Compensation Affords Optimum Control Loop
Tuning
• Automatic Diode Emulation Mode for Highest
Efficiency
• Integrated High-Current MOSFET Drivers and
Schottky Boot-Strap Diode for Optimal Efficiency
• Choice of Overcurrent Detection Schemes
- Lossless Inductor DCR Current Sensing
- Precision Resistive Current Sensing
• Power-Good Monitor for Soft-Start and Fault
Detection
• Fault Protection
- Undervoltage
- Overvoltage
- Overcurrent (DCR-Sense or Resistive-Sense
Capability)
- Over-Temperature Protection
- Fault Identification by PGOOD Pull-Down
Resistance
• TS16949 Compliant
• Fully AEC-Q100 tested
• Pb-Free (RoHS Compliant)
Applications*(see page 16)
• Automotive PC Graphical Processing Unit VCC Rail
• Automotive PC I/O Controller Hub (ICH) VCC Rail
• Automotive PC Memory Controller Hub (GMCH) VCC
Rail
March 8, 2010
FN7583.0
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2010. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
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ISL78210 pdf
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ISL78210
Absolute Maximum Ratings
VCC, PVCC, PGOOD to GND . . . . . . . . . . . . . -0.3V to +7.0V
VCC, PVCC to PGND . . . . . . . . . . . . . . . . . . -0.3V to +7.0V
GND to PGND . . . . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V
EN, VO, FB, OCSET, SREF . . . . . . . -0.3V to GND, VCC +0.3V
BOOT Voltage (VBOOT-GND) . . . . . . . . . . . . . . . -0.3V to 33V
BOOT To PHASE Voltage (VBOOT-PHASE) . . . -0.3V to 7V (DC)
-0.3V to 9V (<10ns)
PHASE Voltage . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 28V
GND -8V (<20ns Pulse Width, 10µJ)
UGATE Voltage . . . . . . . . . . . . VPHASE - 0.3V (DC) to VBOOT
VPHASE - 5V (<20ns Pulse Width, 10µJ) to VBOOT
LGATE Voltage . . . . . . . . . . GND - 0.3V (DC) to VCC + 0.3V
GND - 2.5V (<20ns Pulse Width, 5µJ) to VCC + 0.3V
ESD Rating
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . 3000V
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . 250V
Charged Device Model . . . . . . . . . . . . . . . . . . . . . 2000V
Latch Up (Tested per JESD-78A)
Thermal Information
Thermal Resistance (Typical)
θJA (°C/W) θJC (°C/W)
16 Ld µTQFN Package (Notes 4, 5) . 110
4.3
Junction Temperature Range . . . . . . . . . . -55°C to +150°C
Operating Temperature Range . . . . . . . . . -40°C to +105°C
Storage Temperature . . . . . . . . . . . . . . . . -65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Ambient Temperature Range . . . . . . . . . . -40°C to +105°C
Converter Input Voltage to GND . . . . . . . . . . . . 3.3V to 25V
VCC, PVCC to GND . . . . . . . . . . . . . . . . . . . . . . . . 5V ±5%
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact
product reliability and result in failures not covered by warranty.
NOTE:
4. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief
TB379 for details.
5. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
These specifications apply for TA = -40°C to +105°C, unless otherwise stated. All typical
specifications TA = +25°C, VCC = 5V. Boldface limits apply over the operating
temperature range, -40°C to +105°C.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
MAX
(Note 6) TYP (Note 6) UNIT
VCC and PVCC
VCC Input Bias Current
VCC Shutdown Current
PVCC Shutdown Current
VCC POR THRESHOLD
IVCC
IVCCoff
IPVCCoff
EN = 5V, VCC = 5V, FB = 0.55V, SREF<FB
EN = GND, VCC = 5V
EN = GND, PVCC = 5V
-
-
-
1.1 1.5
0.1 1.0
0.1 1.0
mA
µA
µA
Rising VCC POR Threshold Voltage
Falling VCC POR Threshold Voltage
REGULATION
VVCC_THR
VVCC_THF
4.37
4.10
4.49
4.22
4.60
4.35
V
V
Reference Voltage
System Accuracy
VREF(int)
PWM Mode = CCM
- 0.50 -
-0.75 - +0.75
V
%
PWM
Switching Frequency
VO
FSW
PWM Mode = CCM
270 300 330
kHz
VO Input Voltage Range
VO Input Impedance
VO Reference Offset Current
VO Input Leakage Current
ERROR AMPLIFIER
VVO
RVO
IVOSS
IVOoff
EN = 5V
VENTHR < EN, SREF = Soft-Start Mode
EN = GND, VO = 3.6V
0
- 3.6
V
- 600 -
kΩ
- 10 -
µA
- .1 -
µA
FB Input Bias Current
SREF
IFB EN = 5V, FB = 0.50V
-20
-
+50
nA
SREF Voltage
Soft-Start Current
VSREF
ISS
- 0.5 -
10 20 30
V
µA
5
FN7583.0
March 8, 2010
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ISL78210 arduino
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ISL78210
Compensation Design
Figure 8 shows the recommended Type-II compensation
circuit. The FB pin is the inverting input of the error
amplifier. The COMP signal, the output of the error
amplifier, is inside the chip and unavailable to users. CINT
is a 100pF capacitor integrated inside the IC, connecting
across the FB pin and the COMP signal. RFB, RCOMP,
CCOMP and CINT form the Type-II compensator. The
frequency domain transfer function is given by
Equation 12:
GCOMP(s) = -s-------R----1-F---B-+-----s--C-----I-(-N-R---T--F---B---(--1+-----+R-----sC----O---R-M----C-P---O-)---M----C-P---C----O-C----M-C----PO-----M----P-----)
(EQ. 12)
CINT = 100pF
RCOMP CCOMP
COMP
-
FB
EA
+
SREF
RFB
ROFS
VOUT
FIGURE 8. COMPENSATION REFERENCE CIRCUIT
The LC output filter has a double pole at its resonant
frequency that causes rapid phase change. The R3
modulator used in the IC makes the LC output filter
resemble a first order system in which the closed loop
stability can be achieved with the recommended Type-II
compensation network. Intersil provides a PC-based tool
that can be used to calculate compensation network
component values and help simulate the loop frequency
response.
General Application Design
Guide
This design guide is intended to provide a high-level
explanation of the steps necessary to design a
single-phase power converter. It is assumed that the
reader is familiar with many of the basic skills and
techniques referenced in the following. In addition to
this guide, Intersil provides complete reference designs
that include schematics, bills of materials, and example
board layouts.
Selecting the LC Output Filter
The duty cycle of an ideal buck converter is a function of
the input and the output voltage. This relationship is
written as shown in Equation 13:
D = V-V----I-O-N--
(EQ. 13)
The output inductor peak-to-peak ripple current is
written as shown in Equation 14:
IP P = -V----O-F----S---(-W--1-----–--L--D-----)
(EQ. 14)
A typical step-down DC/DC converter will have an IP-P of
20% to 40% of the maximum DC output load current.
The value of IP-P is selected based upon several criteria,
such as MOSFET switching loss, inductor core loss, and
the resistive loss of the inductor winding. The DC copper
loss of the inductor can be estimated using Equation 15:
PCOPPER
=
IL
O
A
2
D
D
CR
(EQ. 15)
Where ILOAD is the converter output DC current.
The copper loss can be significant so attention has to be
given to the DCR selection. Another factor to consider
when choosing the inductor is its saturation
characteristics at elevated temperature. A saturated
inductor could cause destruction of circuit components,
as well as nuisance OCP faults.
A DC/DC buck regulator must have output capacitance
CO into which ripple current IP-P can flow. Current IP-P
develops a corresponding ripple voltage VP-P across CO,
which is the sum of the voltage drop across the
capacitor ESR and of the voltage change stemming from
charge moved in and out of the capacitor. These two
voltages are written as Equations 16 and 17:
ΔVESR = IP P ESR
(EQ. 16)
and:
ΔVC = 8--------C--I--P-O--------P-F---S----W----
(EQ. 17)
If the output of the converter has to support a load with
high pulsating current, several capacitors will need to be
paralleled to reduce the total ESR until the required VP-P
is achieved. The inductance of the capacitor can cause a
brief voltage dip if the load transient has an extremely
high slew rate. Low inductance capacitors should be
considered. A capacitor dissipates heat as a function of
RMS current and frequency. Be sure that IP-P is shared
by a sufficient quantity of paralleled capacitors so that
they operate below the maximum rated RMS current at
FSW. Take into account that the rated value of a capacitor
can fade as much as 50% as the DC voltage across it
increases.
Selection of the Input Capacitor
The important parameters for the bulk input capacitance
are the voltage rating and the RMS current rating. For
reliable operation, select bulk capacitors with voltage and
current ratings above the maximum input voltage and
capable of supplying the RMS current required by the
switching circuit. Their voltage rating should be at least
1.25x greater than the maximum input voltage, while a
voltage rating of 1.5x is a preferred rating. Figure 9 is a
graph of the input RMS ripple current, normalized
relative to output load current, as a function of duty
cycle that is adjusted for converter efficiency. The ripple
current calculation is written as expressed in
Equation 18:
IIN_RMS
=
(
IM
A
2
X
(
D
D2
)
)
+
x
IM
A
2
X
1--D--2--
----------------------------------------------------------------------------------------------------
IMAX
(EQ. 18)
11
FN7583.0
March 8, 2010
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