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PDF RT3070 Data sheet ( Hoja de datos )
| Número de pieza | RT3070 | |
| Descripción | Highly integrated MAC/BBP and 2.4 GHz RF single chip | |
| Fabricantes | Ralink | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de RT3070 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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RT3070
Datasheet
Preliminary
Revision September 25, 2008
Application
•IEEE802.11 b/g/n Wireless Local Area Networks
•USB 2.0 Wi‐Fi Dongle
Features
• CMOS Technology with RF, Baseband, and MAC
standards, delivers reliable, cost‐effective,
throughput from an extended distance. Optimized RF
Integrated.
• 1T1R Mode with 150Mbps PHY Rate for Both
•
Transmit and Receiving.
Legacy and High Throughput Modes
• 20MHz/40MHz Bandwidth
• Reverse Direction Grant Data Flow and Frame
Aggregation
• WEP 64/128, WPA, WPA2,TKIP, AES
•
•
•
QoS‐WMM, WMM‐PS
WPS,PIN,PBC
Multiple BSSID Support
• USB 2.0
• International Regulation ‐ 802.11d + h
• Cisco CCX Support
• Bluetooth Co‐existence
• Low Power with Advanced Power Management
• Operating Systems ‐ Windows XP 32/64, 2000,
Vista 32/64 , Linux, Macintosh
architecture and baseband
algorithms provide superb performance and low
power consumption. Intelligent MAC design.
deploys a high efficient USB engine and
hardware data processing accelerators without
overloading the host processor. The RT3070 is designed to
support standard based features in the areas of security,
quality of service and international regulation, giving end
users the greatest performance anytime in any
circumstance.
O rder Information
Part Number
RT3070L
Temp Range
‐10~85℃
Package
Green/RoHS
Compliant 76LD
QFN (9mmx9mm)
Ralink Technology, Corp. (Taiwan)
Product Description
5th F. No. 36,Taiyuan St, Jhubei City, Hsin‐Chu,
Taiwan, R.O.C.
The RT3070 is a highly integrated MAC/BBP and 2.4
Tel: 886‐3‐567‐8868 Fax: 886‐3‐567‐8818
GHz RF single chip with 150Mbps PHY rate supporting.
It fully complies with IEEE 802.11n draft 3.0 and IEEE
802.11 b/g feature rich wireless connectivity at high
Ralink Technology, Corp. (USA) Cupertino, CA9501420833
Stevens Creek Blvd. Ste 200
Tel: (408) 725‐8070Fax:(408)725‐8069
http://www.ralinktech.com
Block Diagram
RF_RF2G_INP/
RF_RF2G_INN
RF_RF2G_OUTP
RF
receiver
RF
transmitter
ADC
DAC
Baseband
MAC/
Packet
Buffer/
Encrption
Engine
USB
System
Control
USB bus
EEPROM/
GPIO/LED
digital controlled
RF
DSR3070_V.1.2_092508
Form No.：QS-073-F02
Rev.：1
Kept by： DCC
Ret. Time： 5 Years
-I-
1 page  
7 RF_TSSI_IN
47 BASE_TRX_QN
48 BASE_TRX_QP
49 BASE_TRX_IN
50 BASE_TRX_IP
Digital LDO: 4 pins
9 LDO_CORE_VO12
10 LDO_CORE_VI15
12 LDO_FUSE_VO25
13 LDO_FUSE_VI33
RF Control: 4 pins
6 RF_PA_PE
15 TR_SW0
16 TR_SWN0
25 LNA_PE
LED: 2 pins
19 LED_ACT_N
20 LED_RDYG_N
GPIO: 4 pins
26 GPIO3
27 GPIO2
28 GPIO1
29 GPIO0
USB: 5 pins
34 VRES
35 VDDA
36 PADM
37 PADP
38 VDDL
EEPROM: 4 pins
39 SPICSN
40 SPISCK
41 SPISI
42 SPISO
PLL Power: 2 pins
45 PLLAVDD
46 PLLDVDD
DSRT3070_V1.2_092508
Form No.：QS-073-F02
Rev.：1
RT3070
Datasheet
Preliminary
Revision September 25, 2008
I
Transmit signal strength indicator input from power
amplifier
IO Baseband Q differential input/output
IO Baseband Q differential input/output
IO Baseband I differential input/output
IO Baseband I differential input/output
O 1.2V LDO power output.
P 1.5V power supply for internal LDO
O 2.5V LDO power output
P 3.3V power supply for internal LDO
O Enable control output to external power amplifier
O Positive signal of RX and TX switching control
O Negative signal of RX and TX switching control
O Enable control output to external LNA
O For driving the LED when the wireless device is transmitting
O For driving the LED when the wireless device is active
IO GPIO
IO GPIO
IO GPIO
IO GPIO
Connect to external 8.2K resistor
IO (the 8.2K resistor connects one end to VRES and the other
end to PCB ground)
P 3.3V USB power
IO D‐ line of USB 2.0
IO D+ line of USB 2.0
P 1.2V USB power
O EEPROM chip select
O EEPROM clock
O serial data to EEPROM
I serial data from EEPROM
P 1.2V PLL power
P 1.2V PLL power
Kept by： DCC
-3-
Ret. Time： 5 Years
5 Page 
RT3070
29:24
23
22
21
20
R
R/W
R/W
R/W
R/W
EPOUT_VLD
UDMA_TX_EN
UDMA_RX_EN
RX_AGG_EN
TXOP_HALT
19
18:17
16
15:8
7:0
R/W
R/W
RW
RW
TX_CLEAR
PHY_WD_EN
RX_AGG_LMT
RX_AGG_TO
Datasheet
Preliminary
Revision September 25, 2008
OUT endpoint data valid
0
USB DMA TX enable
0
USB DMA RX enable
0
RX bulk aggregation enable
0
Halt TXOP count down when TX buffer is full.
0: disable
1: enable
0
Clear USB DMA TX path
0
Reserved
USB PHY watch‐dog enable
0
RX bulk aggregation limit. Unit is 1024 bytes
RX bulk aggregation time‐out count. Unit is 1μs
00
00
US_CYC_CNT (offset:0x02A4,default :0x00F00021)
Bits Type Name
31:25
24 R/W TEST_EN
23:16 R/W TEST_SEL
Description
Reserved
Test mode enable
Test mode selection
Init Value
0
8’hf0
15:9
8 R/W BT_MODE_EN
Reserved
Blue‐tooth mode enable
0
7:0 RW US_CYC_CNT
Clock cycle count in 1μs. It’s dependent on the interface 8’h21
clock rate. For PCI 33, set 8’h21. For PCI express, set
8’h7D. For USB, set 8’h1E.
(The remainder of this page is intentionally left blank)
DSRT3070_V1.2_092508
Form No.：QS-073-F02
Rev.：1
Kept by： DCC
-9-
Ret. Time： 5 Years
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet RT3070.PDF ] | |
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