|
|
PDF SY54016R Data sheet ( Hoja de datos )
| Número de pieza | SY54016R | |
| Descripción | Low Voltage 1.2V/1.8V CML Differential Line Driver/Receiver | |
| Fabricantes | Micrel Semiconductor | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de SY54016R (archivo pdf) en la parte inferior de esta página. Total 13 Páginas | ||
|
No Preview Available !
www.DataSheet.co.kr
SY54016R
Low Voltage 1.2V/1.8V CML Differential Line
Driver/Receiver with Fail Safe Input
3.2Gbps, 2.5GHz
General Description
The SY54016R is a fully differential, low voltage
1.2V/1.8V CML Line Driver/Receiver with Fail-Safe
Input. The SY54016R can process clock signals as fast
as 2.5GHz or data patterns up to 3.2Gbps.
The differential input includes Micrel’s unique, 3-pin
input termination architecture that interfaces to LVPECL,
LVDS or CML differential signals, as small as 100mV
(200mVPP) without any level-shifting or termination
resistor networks in the signal path. For AC-coupled
input interface applications, an internal voltage
reference is provided to bias the VT pin. The outputs are
CML, with extremely fast rise/fall times guaranteed to be
less than 95ps.
The SY54016R operates from a 2.5V ±5% core supply
and a 1.8V or 1.2V ±5% output supply and is
guaranteed over the full industrial temperature range
(–40°C to +85°C). The SY54016R is part of Micrel’s
high-speed, Precision Edge® product line.
Data sheets and support documentation can be found
on Micrel’s web site at: www.micrel.com.
Functional Block Diagram
Features
Precision Edge®
• 1.2V/1.8V CML Line Driver/Receiver with Fail-Safe
Input
• Guaranteed AC performance over temperature and
voltage:
– DC-to- > 3.2Gbps throughput
– <370ps propagation delay (IN-to-Q)
– <95ps rise/fall times
• Ultra-low jitter design
– <1psRMS cycle-to-cycle jitter
– <10psPP total jitter
– <1psRMS random jitter
– <10psPP deterministic jitter
• High-speed CML outputs
• 2.5V ±5% , 1.8/1.2V ±5% power supply operation
• Industrial temperature range: –40°C to +85°C
• Available in 8-pin (2mm x 2mm) MLF® package
Applications
• Data Distribution: OC-48, OC-48+FEC
• SONET clock and data distribution
• Fibre Channel clock and data distribution
• Gigabit Ethernet clock and data distribution
Markets
• Storage
• ATE
• Test and measurement
• Enterprise networking equipment
• High-end servers
• Metro area network equipment
Precision Edge is a registered trademark of Micrel, Inc.
MLF and MicroLeadFrame are registered trademarks of Amkor Technology.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
June 2008
M9999-061808-A
[email protected] or (408) 955-1690
Datasheet pdf - http://www.DataSheet4U.net/
1 page  
www.DataSheet.co.kr
Micrel, Inc.
Functional Description
Fail-Safe Input (FSI)
The input includes a special failsafe circuit to sense
the amplitude of the input signal and to latch the
output when there is no input signal present, or when
the amplitude of the input signal drops sufficiently
below 100mVPK (200mVPP), typically 30mVPK.
Maximum frequency of the SY54016R is limited by the
FSI function.
Input Clock Failure Case
If the input clock fails to a floating, static, or extremely
low signal swing, the FSI function will eliminate a
metastable condition and guarantee a stable output.
No ringing and no undetermined state will occur at the
output under these conditions.
Note that the FSI function will not prevent duty cycle
distortion in case of a slowly deteriorating (but still
toggling) input signal close to the FSI threshold. Due
to the FSI function, the propagation delay will depend
on rise and fall time of the input signal and on its
amplitude. Refer to “Typical Characteristics” for
detailed information
Interface Applications
For Input Interface Applications see Figures 4a-f and
for CML Output Termination see Figures 5a-d.
CML Output Termination with VCCO 1.2V
For VCCO of 1.2V, Figure 5a, terminate the output
with 50Ω-to-1.2V, DC-coupled, not 100Ω differentially
across the outputs.
If AC-coupling is used, Figure 5d, terminate into 50Ω-
to-1.2V before the coupling capacitor and then
connect to a high value resistor to a reference voltage.
Do not AC couple with internally terminated receiver.
For example, 50Ω ANY-IN input. AC-coupling will
offset the output voltage by 200mV and this offset
voltage will be too low for proper driver operation.
SY54016R
CML Output Termination with VCCO 1.8V
For VCCO of 1.8V, Figure 5a and Figure b, terminate
with either 50Ω to 1.8V or 100Ω differentially across
the outputs. AC- or DC-coupling is fine.
Input AC-Coupling
The SY54016R input can accept AC-coupling from
any driver. Tie VT to VCC with a capacitor as shown
in Figures 4c and 4d. VT has an internal high
impedance resistor divider as shown in Figure 2a, to
provide a bias voltage for AC-coupling.
June 2008
5 M9999-061808-A
[email protected] or (408) 955-1690
Datasheet pdf - http://www.DataSheet4U.net/
5 Page 
www.DataSheet.co.kr
Micrel, Inc.
Input Interface Applications
SY54016R
Figure 4a. CML Interface
(DC-Coupled, 1.8V, 2.5V)
Figure 4b. CML Interface
(DC-Coupled, 1.2V)
Figure 4c. CML Interface
(AC-Coupled)
Figure 4d. LVPECL Interface
(AC-Coupled)
Figure 4e. LVPECL Interface
(DC-Coupled)
Figure 4f. LVDS Interface
June 2008
11
M9999-061808-A
[email protected] or (408) 955-1690
Datasheet pdf - http://www.DataSheet4U.net/
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet SY54016R.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| SY54016R | Low Voltage 1.2V/1.8V CML Differential Line Driver/Receiver | Micrel Semiconductor |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |