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PDF CXM3582UR Data sheet ( Hoja de datos )

Número de pieza CXM3582UR
Descripción SP10T Antenna Switch Module 6TRx/2Tx/2Rx
Fabricantes Sony Electronics 
Logotipo Sony Electronics Logotipo



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SP10T Antenna Switch Module 6TRx/2Tx/2Rx
CXM3582UR
Description
The CXM3582UR is a SP10T antenna switch module for GSM/UMTS/CDMA/LTE multi-mode handset.
The CXM3582UR has a built-in dual low pass filter and a +1.8 V CMOS compatible decoder.
The Sony GaAs junction gate pHEMT (JPHEMT) MMIC process is used for low insertion loss and high linearity.
The device has low BOM with no DC blocking capacitor.
(Applications: GSM/UMTS/CDMA/LTE multi-mode handsets)
Features
Low insertion loss: 0.45 dB (Typ.) TRx (Cellular band)
0.60 dB (Typ.) TRx (IMT Tx band)
High linearity: IIP3 = 68 dBm
Battery direct operation: VDD = 2.5 V to 5.0 V
No DC blocking capacitors except sourcing DC bias
Small package size: 26-pin UQFN (2.6 mm x 3.4 mm x 0.6 mm Max.)
Lead-free and RoHS compliant
Structure
GaAs junction gate pHEMT (JPHEMT) MMIC switch, CMOS decoder
Absolute Maximum Ratings
Bias voltage VDD
Control voltage VCTL
Input power max. [Tx1]
Input power max. [Tx2]
Input power max. [TRx]
Input power max. [Rx]
Operating temperature
Storage temperature
6 V (Ta = 25 °C)
4 V (Ta = 25 °C)
36 dBm (Duty cycle = 12.5 % to 50 %) (Ta = 25 °C)
34 dBm (Duty cycle = 12.5 % to 50 %) (Ta = 25 °C)
32 dBm (Ta = 25 °C)
13 dBm (Ta = 25 °C)
–35 to +90 °C
–65 to +150 °C
GaAs MMIC’s are ESD sensitive devices. Special handling precautions are required.
1
E11907-PS
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CXM3582UR pdf
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CXM3582UR
Target Specification
(VDD = 2.5 V, Ta = 25 °C)
Item Symbol
Path
Ant - TRx1
Ant - TRx2
Ant - TRx3
Insertion loss
IL
Ant - TRx4
Ant - TRx5
VSWR
Harmonics
Ant - TRx6
VSWR
2fo
3fo
2fo
2fo
3fo
2fo
3fo
Ant - Tx1
Ant - Tx2
Ant - Rx1, 2
All ports in active paths
Ant - TRx1, 2, 3, 4, 5, 6
Ant - TRx4
Ant - Tx1
Ant - Tx2
Attenuation
Tx1 - Ant
ATT
Tx2 - Ant
Inter modulation
product power in
Rx band
Input IP3
Switching time
Wake up time
Control current
Supply current
Supply current
IMD2
IMD3
IIP3
Ts
Tw
Ictl
IDD
IDD
Ant - TRx1, 2, 3, 4, 5 ,6
Ant - TRx1, 2, 3, 4, 5, 6
Active mode
Active mode
Idle mode
Condition
*1, *2, *3, *10
*4, *11
*5
*1, *2, *3, *10
*4, *11
*5
*1, *2, *3, *10
*4, *11
*5
*1, *2, *3, *10
*4, *11
*5
*1, *2, *3, *10
*4, *11
*5
*6
*7
*1, *2, *3, *10
*4, *11
*5
*8
*9
*10
*11
600 to 2170 MHz
*3, *4
*2, *12B
*8
*9
1648 to 1805 MHz
1805 to 1830 MHz
2472 to 2745 MHz
3296 to 10000 MHz
10000 to 12750 MHz
3420 to 3820 MHz
5130 to 5730 MHz
6840 to 12750 MHz
Min. Typ. Max. Unit
— 0.48 0.58
— 0.65 0.80
— 0.69 0.84
— 0.46 0.56
— 0.63 0.78
— 0.70 0.85
— 0.40 0.50
— 0.54 0.69
— 0.58 0.73
— 0.39 0.49
— 0.49 0.64
0.51 0.66
0.44 0.54
dB
— 0.60 0.75
— 0.66 0.81
— 0.75 0.95
— 0.96 1.16
— 0.45 0.55
— 0.69 0.84
— 0.75 0.90
— 1.10 1.20
— 1.20 1.35
— 0.80 0.90
— 0.99 1.14
— — 1.50 —
— — –40
— — –40
— — –78
— — –36 dBm
— — –36
— — –36
— — –36
25 — —
30 — —
25 — —
20 —
15 —
dB
25 — —
25 — —
20 — —
*12A, 13, 14, 17, 18, 21, 22 — — –105
*12A, 15, 16, 19, 20, 23, 24 —
— –105 dBm
*12A, 25, 26
50 % Ctl to 90 % RF
Wake up time from
Idle mode to Active mode
VCTL = 1.80 V
VDD = 2.8 V
VDD = 2.8 V
— 68 —
—3
5
— 30 50
—1
5
— 0.22 0.4
— — 20
µs
µs
µA
mA
µA
5
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CXM3582UR arduino
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Recommended Circuit 3
2nd Harmonics Improvement at LTE (Band13)
CXM3582UR
13 12 11 10 9
GND 14
GND
8
Rx2 15
ANT
7
GND 16
GND
6
Rx1 17
UQFN-26P PKG
GND
5
(2.6 mm × 3.4 mm × 0.6 mm Max.)
TRx1 18
TRx6
4
Top View
TRx2 19
TRx5
3
TRx3 20
TRx4
2
GND 21
GND
1
22 23 24 25 26
C2
C1
L1
C3
L2
*1: No DC blocking capacitors are required on all RF ports. (Except sourcing DC bias)
*2: DC levels of all RF ports are GND.
*3: L1 (47 nH) and C1(22 pF) are recommended on Ant port for ESD protection.
*4: C2 Capacitor (100 pF) is recommended.
*5: TRx5 is recommended for Band7.
*6: L2 (1.8 nH) and C3 (4.0 pF) are recommended when TRx4 is assigned for Band 13.
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