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PDF MMA655x Data sheet ( Hoja de datos )

Número de pieza MMA655x
Descripción Single Axis SPI Inertial Sensor
Fabricantes Motorola Semiconductor Products 
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Freescale Semiconductor
Data Sheet: Advance Information
Single Axis SPI Inertial Sensor
MMA655x is a SPI-based, single axis, medium-g, over-damped lateral accel-
erometer designed for use in Automotive Airbag systems.
Features
• ±105g or ±120g full-scale range
• 3.3V or 5V single supply operation
• SPI-compatible serial interface
• 12-bit digital signed or unsigned SPI data output
• Programmable arming function
• Twelve low-pass filter options, ranging from 50 Hz to 1000 Hz
• Optional offset cancellation with > 6s averaging period and < 0.25 LSB/s slew
rate
• Pb-Free 16-Pin QFN-6 x 6 Package
Referenced Documents
• AEC-Q100, Revision G, dated May 14, 2007 (http://www.aecouncil.com/)
Device
MMA6555KWR2
MMA6556KWR2
ORDERING INFORMATION
Axis
Range
X 105g
X 120g
Shipping
Tape & Reel
Tape & Reel
Document Number: MMA655X
Rev 0, 06/2011
MMA655x
Bottom View
16 LEAD QFN
6 mm x 6 mm
CASE 2086-01
VCC
VCC
CS
VREG
SCLK
VREGA
MOSI
MISO
C1 C2 C3
MMA655x
VSSA
VSS
VPP/TEST
ARM
Figure 1. Application Diagram
Table 1. External Component Recommendations
Ref Des
Type
Description
C1
Ceramic
0.1 μF, 10%, 10V Minimum, X7R
C2
Ceramic
1 μF, 10%, 10V Minimum, X7R
C3
Ceramic
1 μF, 10%, 10V Minimum, X7R
Purpose
VCC Power Supply Decoupling
Voltage Regulator Output Capacitor (CVREG)
Voltage Regulator Output Capacitor (CVREGA)
This document contains information on a new product. Specifications and information herein
are subject to change without notice.
© Freescale Semiconductor, Inc., 2011. All rights reserved.
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2.3 Electrical Characteristics - Power Supply and I/O
VL (VCC - VSS) VH, TL TA TH, |ΔTA| < 25 K/min unless otherwise specified
# Characteristic
Symbol
Min
18 Supply Current
Power Supply Monitor Thresholds (See Figure 9)
19 VCC Under Voltage (Falling)
20 VREG Under Voltage (Falling)
21 VREG Over Voltage (Rising)
22 VREGA Under Voltage (Falling)
23 VREGA Over Voltage (Rising)
Power Supply Monitor Hysteresis
24 VCC Under Voltage
25 VREG Under Voltage, VREG Over Voltage
26 VREGA Under Voltage, VREGA Over Voltage
* IDD
* VCC_UV_f
* VREG_UV_f
* VREG_OV_r
* VREGA_UV_f
* VREGA_OV_r
VHYST
VHYST
VHYST
3.0
2.74
2.10
2.65
2.20
2.65
65
20
20
Power Supply RESET Thresholds
(See Figure 6, and Figure 9)
27 VREG Under Voltage RESET (Falling)
28 VREG Under Voltage RESET (Rising)
29 VREG RESET Hysteresis
* VREG_UVR_f
* VREG_UVR_r
VHYST
1.764
1.876
80
Internally Regulated Voltages
30 VREG
31 VREGA
* VREG
* VREGA
2.42
2.42
External Filter Capacitor (CVREG, CVREGA)
32 Value
33 ESR (including interconnect resistance)
CVREG, CVREGA
ESR
700
Power Supply Coupling
34 50 kHz fn 300 kHz
35 4 MHz fn 100 MHz
Output High Voltage (MISO, PCM)
36 3.15 V (VCC - VSS) 3.45 V (ILoad = -1 mA)
37 4.75 V (VCC - VSS) 5.25 V (ILoad = -1 mA)
* VOH_3
* VOH_5
VCC - 0.2
VCC - 0.4
Output Low Voltage (MISO, PCM)
38 3.15 V (VCC - VSS) 3.45 V (ILoad = 1 mA)
39 4.75 V (VCC - VSS) 5.25 V (ILoad = 1 mA)
* VOL_3
* VOL_5
Open Drain Output High Voltage (ARM)
40 3.15 V (VCC - VSS) 3.45 V (IARM = -1 mA)
41 4.75 V (VCC - VSS) 5.25 V (IARM = -1 mA)
* VODH_3
* VODH_5
VCC - 0.2
VCC - 0.4
Open Drain Output Pull-down Current (ARM)
42 3.15 V (VCC - VSS) 3.45 V (VARM = 1.5V)
43 4.75 V (VCC - VSS) 5.25 V (VARM = 1.5V)
* IODPD_3
* IODPD_5
50
50
Open Drain Output Low Voltage (ARM)
44 3.15 V (VCC - VSS) 3.45 V (IARM = 1 mA)
45 4.75 V (VCC - VSS) 5.25 V (IARM = 1 mA)
* VODH_3
* VODH_5
Open Drain Output Pull-up Current (ARM)
46 3.15 V (VCC - VSS) 3.45 V (VARM = 1.5V)
47 4.75 V (VCC - VSS) 5.25 V (VARM = 1.5V)
* IODPU_3
* IODPU_5
-100
-100
48 Input High Voltage CS, SCLK, MOSI
49 Input Low Voltage CS, SCLK, MOSI
50 Input Voltage Hysteresis CS, SCLK, MOSI
Input Current
51 High (at VIH)(SCLK, MOSI)
52 Low (at VIL)(CS)
* VIH
* VIL
* VI_HYST
* IIH
* IIL
2.0
0.125
-70
30
Typ
100
100
100
2.50
2.50
1000
-50
50
Sensor
Freescale Semiconductor
Max Units
7.0 mA (1)
3.02 V (3,6)
2.25 V (3,6)
2.85 V (3,6)
2.35 V (3,6)
2.85 V (3,6)
110 mV (3)
210 mV (3)
150 mV (3)
2.024
2.152
140
V (3,6)
V (3,6)
mV (3)
2.58 V (1,3)
2.58 V (1,3)
1500
400
nF (19)
mΩ (19)
0.004
0.004
LSB/mv (19)
LSB/mv (19)
— V (2,3)
— V (2,3)
0.2 V (2,3)
0.4 V (2,3)
— V (2,3)
— V (2,3)
100 μA (2,3)
100 μA (2,3)
0.2 V (2,3)
0.4 V (2,3)
-50
-50
1.0
0.500
-30
70
μA (2,3)
μA (2,3)
V (3,6)
V (3,6)
V (19)
μA (2,3)
μA (2,3)
MMA655x
5
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3.1.1 Device Serial Number Registers
A unique serial number is programmed into the serial number registers of each device during manufacturing. The serial num-
ber is composed of the following information:
Bit Range
S12 - S0
S31 - S13
Content
Serial Number
Lot Number
Serial numbers begin at 1 for all produced devices in each lot, and are sequentially assigned. Lot numbers begin at 1 and are
sequentially assigned. No lot will contain more devices than can be uniquely identified by the 13-bit serial number. Depending on
lot size and quantities, all possible lot numbers and serial numbers may not be assigned.
The serial number registers are included in the OTP shadow register array CRC verification. Reference Section 3.2.1 for de-
tails regarding the CRC verification. Beyond this, the contents of the serial number registers have no impact on device operation
or performance, and are only used for traceability purposes.
3.1.2 Self Test Deflection Register (STDEFL)
This read-only register provides the nominal self test deflection values at ambient temperature. The self test value is a positive
deflection value, measured at the factory, and factory programmed for each device. The minimum stored value ($00) equates to
the minimum deflection specified in Section 2.4 (ΔSTMIN), and the maximum stored value ($FF) equates to the maximum deflec-
tion specified in Section 2.4 (ΔSTMAX).
Table 4. Self Test Deflection Register
Location
Bit
Address Register
7
6
5
4
3
2
1
0
$04
STDEFL STDEFL[7]
STDEFL[6]
STDEFL[5]
STDEFL[4]
STDEFL[3]
STDEFL[2]
STDEFL[1]
STDEFL[0]
When self test is activated, the acceleration reading can be compared to the value in this register. The difference from the
measured deflection value, and the nominal deflection value stored in the register shall not fall outside the self test accuracy limits
specified in Section 2.4 (ΔSTACC). Reference Section 3.6 for more details on calculating the self test Limits.
3.1.3 Factory Configuration Registers
The factory configuration register is a one time programmable, read only registers which contain customer specific device con-
figuration information that is programmed by Freescale.
Table 5. Factory Configuration Register
Location
Bit
Address Register
7
6
5
4
3
2
1
0
$06 FCTCFG
1
0
0
0
0
0
0
0
Sensor
Freescale Semiconductor
MMA655x
11
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