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PDF TLE7240SL Data sheet ( Hoja de datos )
| Número de pieza | TLE7240SL | |
| Descripción | 8 Channel Protected Low-Side Relay Switch | |
| Fabricantes | Infineon Technologies | |
| Logotipo |  |
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Data Sheet, Rev. 1.1, April 2009
SPIDER - TLE 7240SL
www.DataSheet4U.net
8 Channel Protected Low-Side Relay Switch
Automotive
1 page  
2 Block Diagram
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7240SL
Block Diagram
VDD
VDDA
RST
IN1
IN2
IN3
IN4
LHI
CS
SCLK
SI
SO
stand-by control
input mux and
control
SPI
control,
diagnostic
and
protective
functions
diagnosis
register
temperature
sensor
short circuit
detection
gate
control
open load
detection
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
Figure 1 Block Diagram for the SPIDER - TLE 7240SL
GND
Blockdiagram .emf
Data Sheet
5 Rev. 1.1, 2009-04-15
5 Page 
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7240SL
Input and Power Stages
5 Input and Power Stages
The SPIDER - TLE 7240SL is a eight channel low-side relay switch.
The power stages are built by N-channel vertical power MOSFET transistors.
5.1 Power Supply
The SPIDER - TLE 7240SL is supplied by two power supply lines VDD and VDDA.
The digital power supply line VDD is designed to be functional at a very wide voltage range. The analog power
supply VDDA supports 5 V supply.
There are power-on reset functions implemented for both supply lines. After start-up of the power supply, all SPI
registers are reset to their default values and the device is in stand-by mode. Capacitors at pins VDD -GND and
VDDA -GND are recommended.
There is a reset pin available. Low level at this pin causes all registers to be set to their default values and the
quiescent supply currents are minimized.
5.1.1
Limp Home Mode
The SPIDER - TLE 7240SL offers the capability of driving dedicated channels during eventual fail-safe operation
of the system. This limp home mode is activated by a high signal at pin LHI. In this mode, the SPI registers are
reset and the input pins are directly routed to their corresponding channels OUT1 to OUT4, see Table 2 for details.
OUT5 to OUT8 are turned off in limp home mode. Furthermore, the SPI is ignored and all input pin are referred to
VDDA in order to ensure a defined operation mode if the digital supply or the microcontroller fail.
A high signal on LHI overrides a Reset signal on RST. In case of a limp home during standby the device will
therefore wake up and enter the limp home mode.
After limp home operation all registers are reset and the device enters in standby mode following low logic RST
state, or returns to idle (all channels OFF). Next SPI transmission will receive a TER Flag.
Input
IN1
IN2
IN3
IN4
Table 2
Routing during limp home mode
controlled
Output
OUT1
OUT2
OUT3
OUT4
5.2 Input Circuit
There are four input pins available at SPIDER - TLE 7240SL, which can be configured to be used for control of
the output stages. The INn parameter of the SPI selects the input pin to be used. Figure 4 shows the input circuit
of SPIDER - TLE 7240SL.
During Limp home mode a default routing is switched and the SPI commands are ignored.
Data Sheet
11 Rev. 1.1, 2009-04-15
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet TLE7240SL.PDF ] | |
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