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PDF MC13783 Data sheet ( Hoja de datos )
| Número de pieza | MC13783 | |
| Descripción | Power Management and Audio Circuit | |
| Fabricantes | Freescale Semiconductor | |
| Logotipo |  |
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Freescale Semiconductor
Data Sheet: Technical Data
Document Number: MC13783
Rev. 3.5, 7/2009
MC13783
MC13783
Power Management and
Audio Circuit
Package Information
Plastic Package
10 × 10 mm package
Ordering Information
Device
MC13783
Device Marking or
Operating
Temperature Range
Package
–30 to +85°C MAPBGA-247
1 Introduction
The MC13783 is a highly integrated power management
and audio component dedicated to handset and portable
applications covering GSM, GPRS, EDGE, and UMTS
standards. The MC13783 implements high-performance
audio functions suited to high-end applications such as
smartphones and UMTS handsets.
The MC13783 provides the following key benefits:
• Full power management and audio functionality
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in one module optimizes system size.
• High level of integration reduces the power
management and audio system bill of materials.
• Versatile solution offers large possibilities of
flexibility through simple programming (64
registers of 24-bit data).
• Implemented DVS saves significant battery
resources in every mode (compatibility with a
large number of processors).
• Dual channel voice ADC improves intelligibility.
Contents
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 Signal Descriptions . . . . . . . . . . . . . . . . . . . . 6
3 Electrical Characteristics . . . . . . . . . . . . . . 16
4 Functional Description . . . . . . . . . . . . . . . . 17
5 Package Information . . . . . . . . . . . . . . . . . . 47
6 Product Documentation . . . . . . . . . . . . . . . . 48
Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its
products.
© Freescale Semiconductor, Inc., 2005–2009. All rights reserved.
1 page  
Introduction
regulators for the USB transceiver. The boost converter output has a backlight headroom tracking option
to reduce overall power consumption.
The regulators are directly supplied from the battery or from the switchers and include supplies for IO and
peripherals, audio, camera, multi media cards, SIM cards, memory and the transceivers. Enables for
external discrete regulators are included as well as a vibrator motor regulator. A dedicated preamplifier
audio output is available for multifunction vibrating transducers.
Drivers for power gating with external NMOS transistors are provided including a fully integrated charge
pump. This will allow to power down parts of the processor to reduce leakage current.
1.3 Battery Management
The MC13783 supports different charging and supply schemes including single path and serial path
charging. In single path charging, the phone is always supplied from the battery and therefore always has
to be present and valid. In a serial path charging scheme, the phone can operate directly from the charger
while the battery is removed or deeply discharged.
The charger interface provides linear operation via an integrated DAC and unregulated operation like used
for pulsed charging. It incorporates a standalone trickle charge mode in case of a dead battery with LED
indicator driver. Over voltage, short circuit and under voltage detectors are included as well as charger
detection and removal. The charger includes the necessary circuitry to allow for USB charging and for
reverse supply to an external accessory. The battery management is completed by a battery presence
detector and an A to D converter that serves for measuring the charge current, battery and other supply
voltages as well as for measuring the battery thermistor and die temperature.
1.4 Logic
The MC13783 is fully programmable via SPI bus. Additional communication is provided by direct logic
interfacing. Default startup of the device is selectable by hard-wiring the power up mode select pins.
Both the call processor and the applications processor have full access to the MC13783 resources via two
independent SPI busses. The primary SPI bus is able to allow the secondary SPI bus to control all or some
of the registers. On top of this an arbitration mechanism is built in for the audio, the power and ADC
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functions. This together will avoid programming conflicts in case of a dual processor type of application.
The power cycling of the phone is driven by the MC13783. It has the interfaces for the power buttons and
dedicated signaling interfacing with the processor. It also ensures the supply of the memory and other
circuits from the coin cell in case of brief power failures. A charger for the coin cell is included as well.
Several pre-selectable power modes are provided such as SDRAM self refresh mode and user off mode.
The MC13783 provides the timekeeping based on an integrated low power oscillator running with a
standard watch crystal. This oscillator is used for internal clocking, the control logic, and as a reference
for the switcher PLL. The timekeeping includes time of day, calendar and alarm. The clock is put out to
the processors for reference and deep sleep mode clocking.
Freescale Semiconductor
MC13783 Technical Data, Rev. 3.5
5
5 Page 
Signal Descriptions
Table 1. Pinout Listing (continued)
Pin Location Rating*
Function
VBUS
D3 EHV When in common input configuration, shorted to CHRGRAW
1. USB transceiver cable interface VBUS
2. Output VBUS regulator in USB on the go mode
EMV When in separate input configuration, not shorted to CHRGRAW
1. USB transceiver cable interface VBUS
2. Output VBUS regulator in USB on the go mode
VUSB
F5 MV Output VUSB regulator as used by the USB transceiver
USBVCC
E7 LV Supply for processor interface
GNDUSBA
A1 — Ground for USB transceiver and USB cable
A2
B1
GNDUSBD
K9 — Ground for USB processor interface
Control Logic
ON1B
E16 LV Power on/off button connection 1
ON2B
E15 LV Power on/off button connection 2
ON3B
G14 LV Power on/off button connection 3
WDI F17 LV Watchdog input
RESETB
G15 LV Reset output
RESETBMCU
F18
LV Reset for the processor
STANDBYPRI
H14
LV Standby input signal from primary processor
STANDBYSEC
J13
LV Standby input signal from secondary processor
LOBATB
N14 LV Low battery indicator signal or end of life indicator signal
PWRRDY
U17 LV Power ready signal after DVS and power gate transition
PWRFAIL
F13 LV Powerfail indicator output to processor or system
USEROFF
E14 LV User off signaling from processor
MEMHLDDRV
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CSOUT
G12
G11
LV Memory hold FET drive for power cut support
LV Chip select output for memory
LICELL
C16 MV 1. Coincell supply input
2. Coincell charger output
VBKUP1
E12 LV Backup output voltage for memory
VBKUP2
F12 LV Backup output voltage for processor core
GNDCTRL
J12 — Ground for control logic
* The maximum voltage rating is given per category of pins:
• EHV for Extended High Voltage (20 V)
• HV for High Voltage (7.5 V)
• EMV for Extended Medium Voltage (5.5 V)
• MV for Medium Voltage (4.65 V)
• LV for Low Voltage (3.1 V)
Freescale Semiconductor
MC13783 Technical Data, Rev. 3.5
11
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