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PDF CY26126 Data sheet ( Hoja de datos )
| Número de pieza | CY26126 | |
| Descripción | Dual Output 125-MHz Clock Generator | |
| Fabricantes | Cypress Semiconductor | |
| Logotipo |  |
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5
Advance Information
CY26126
Dual Output 125-MHz
Clock Generator
Features
• Integrated phase-locked loop
• Low skew, low jitter, high accuracy outputs
• 3.3V Operation
Part Number Outputs
CY26126
2
Input Frequency Range
25 MHz
Logic Block Diagram
Benefits
Highest-performance PLL tailored for multimedia applications
Meets critical timing requirements in complex system designs
Output Frequencies
2 copies of 125 MHz (3.3V)
25 XIN
XOUT
OSC.
OE
P Comp
Q
VCO
P
PLL
OUTPUT
MULTIPLEXER
AND
DIVIDERS
VDD
VSS
125 MHz
125 MHz
Pin Configurations
CY26126
8-pin SOIC
XIN
VDD
OE
VSS
1
2
3
4
www.DataSheet4U.com
8 XOUT
7 CLKB
6 CLKA
5 VSS
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Document #: 38-07351 Rev. *A
Revised December 14, 2002
1 page  
Advance Information
CY26126
Document Title: CY26126 Dual Output 125-MHz Clock Generator
Document Number: 38-07351
REV.
ECN NO.
Issue
Date
Orig. of
Change
Description of Change
**
112233 03/01/02
CKN New data sheet
*A
121891 12/14/02
RBI
Power up requirements added to Operating Conditions Information
www.DataSheet4U.com
Document #: 38-07351 Rev. *A
Page 5 of 5
5 Page | ||
| Páginas | Total 5 Páginas | |
| PDF Descargar | [ Datasheet CY26126.PDF ] | |
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