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PDF CY26049-22 Data sheet ( Hoja de datos )
| Número de pieza | CY26049-22 | |
| Descripción | Global Communications Clock Generator | |
| Fabricantes | Cypress Semiconductor | |
| Logotipo |  |
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CY26049-22
FailSafe™ PacketClock™
Global Communications Clock Generator
Features
Benefits
• Fully integrated phase-locked loop (PLL)
• FailSafe output
• PLL driven by a crystal oscillator that is phase aligned
with external reference
• 100-MHz output from 10-MHz input
• Low-jitter, high-accuracy outputs
• 3.3V ± 5% operation
• 16-lead TSSOP
• Integrated high-performance PLL tailored for telecommuni-
cations frequency synthesis eliminates the need for external
loop filter components
• When reference is off, DCXO maintains clock outputs and
SAFE pin indicates FailSafe conditions
• DCXO maintains continuous operation should the input
reference clock fail
• Glitch-free transition simplifies system design
• Works with commonly available, low-cost 10-MHz crystal
• Zero-ppm error for all output frequencies
• Compatible across industry standard design platforms
• Industry standard package with 6.4 × 5.0 mm2 footprint and
a height profile of just 1.1 mm
Logic Block Diagram
input reference
(10M Hz)
IC L K
external pullable crystal
(10M Hz)
XIN XOUT
F A ILS A F ETM
CONTROL
D IG IT A L
CONTROLLED
CRYSTAL
O SCILLATOR
PHASE
LOCKED
LOOP
OUTPUT
D IV ID E R
CLKA
100M H z
SAFE
ICLK detected
www.DataSheet4U.com
Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600
Document #: 38-07730 Rev. **
Revised January 12, 2005
1 page  
Package Drawing and Dimensions
16-lead TSSOP 4.40 MM Body Z16.173
CY26049-22
PIN 1 ID
1
6.25[0.246]
6.50[0.256]
4.30[0.169]
4.50[0.177]
DIMENSIONS IN MM[INCHES] MIN.
REFERENCE JEDEC MO-153
PACKAGE WEIGHT 0.05gms
MAX.
16
0.65[0.025]
BSC.
0.85[0.033]
0.95[0.037]
0.19[0.007]
0.30[0.012]
1.10[0.043] MAX.
4.90[0.193]
5.10[0.200]
0.05[0.002]
0.15[0.006]
0.076[0.003]
SEATING
PLANE
0.25[0.010]
BSC
GAUGE
PLANE
0° -8°
0.50[0.020]
0.70[0.027]
0.09[[0.003]
0.20[0.008]
51-85091-*A
FailSafe and PacketClock are trademarks of Cypress Semiconductor. Corporation. All product and company names mentioned
in this document are the trademarks of their respective holders.
www.DataSheet4U.com
Document #: 38-07730 Rev. **
Page 5 of 6
© Cypress Semiconductor Corporation, 2005. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be
used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its
products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
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