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PDF ISL80101A Data sheet ( Hoja de datos )
| Número de pieza | ISL80101A | |
| Descripción | High Performance 1A Linear Regulator | |
| Fabricantes | Intersil | |
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DATASHEET
High Performance 1A Linear Regulator with
Programmable Current Limiting
ISL80101A
The ISL80101A is a low dropout voltage, single output LDO
with programmable current limiting. This LDO operates from
input voltages of 2.2V to 6V, and is capable of providing output
voltages of 0.8V to 5V. Other custom voltage options are
available upon request.
A submicron BiCMOS process is utilized for this product family
to deliver the best-in-class analog performance and overall
value. The programmable current limiting improves system
reliability of end applications. An external capacitor on the
soft-start pin provides an adjustable soft-starting ramp. The
ENABLE feature allows the part to be placed into a low
quiescent current shutdown mode.
This CMOS LDO will consume significantly lower quiescent
current as a function of load compared to bipolar LDOs, which
translates into higher efficiency and packages with smaller
footprints. Quiescent current is modestly compromised to
achieve a very fast load transient response.
Table 1 shows the differences between the ISL80101A and
others in its family:
TABLE 1. KEY DIFFERENCES BETWEEN FAMILY OF PARTS
PART NUMBER
ISL80101-ADJ
PROGRAMMABLE
ILIMIT
No
ILIMIT
(DEFAULT)
1.75A
ADJ or FIXED
VOUT
ADJ
ISL80101
No
1.75A
1.8V, 2.5V,
3.3V, 5.0V
ISL80101A
Yes
1.62A
ADJ
ISL80121-5
Yes
0.75A
5.0V
Features
• ±2% VADJ accuracy guaranteed over line, load and
TJ = -40°C to +125°C
• Very low 212mV dropout voltage at VIN = 4.5V
• High accuracy current limit programmable up to 1.75A
• Very fast transient response
• 100µVRMS output noise
• Power-good output
• Programmable soft-start
• Over-temperature protection
• Small 10 Ld DFN package
Applications
• Telecommunications and networking
• Medical equipment
• Instrumentation systems
• USB devices
• Gaming
• Routers and switchers
5.0V ± 5%
10µF
CIN
RSET
10k
R1
10 VIN
9 VIN
VOUT 1
VOUT 2
100pF
CPB
8 ISET
ADJ 3
ISL80101A
7 ENABLE PG 4
0.01µF
CSS
6 SS
GND
5
3.3V
2.61k
R3
0.464k
R2
10µF
COUT
100k
1.5
1.2
0.9
0.6
0.3
VIN = 4.5V
VIN = 5.5V
VIN = 5.0V
0.0
10
IL
I
MIT
~
1.62
–
-2---.--9---x----2----x----V----I--N------–----1--
RSETk
FIGURE 1. TYPICAL APPLICATION
100
RSET (kΩ)
1000
August 11, 2015
FN7712.4
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2010, 2011, 2015. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL80101A
Electrical Specifications Unless otherwise noted, all parameters are established over the following specified conditions:
2.2V < VIN < 6V, VOUT = 0.5V, TJ = +25°C, ILOAD = 0A. Applications must follow thermal guidelines of the package to determine worst case junction
temperature. Please refer to “Functional Description” on page 8 and Tech Brief TB379. Boldface limits apply across the operating temperature range,
-40°C to +125°C. Pulse load techniques used by ATE to ensure TJ = TA defines established limits. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN MAX
(Note 8) TYP (Note 8) UNITS
AC CHARACTERISTICS
Input Supply Ripple Rejection
Output Noise Voltage
PSRR
f = 1kHz, ILOAD = 1A, VIN = 5.0V, VOUT = 3.3V
f = 120Hz, ILOAD = 1A, VIN = 5.0V, VOUT = 3.3V
ILOAD = 10mA, BW = 300Hz < f < 300kHz, VIN = 3.7,
VOUT = 3.3V
VIN = 2.2V, VOUT = 1.8V, ILOAD = 1A,
BW = 100Hz < f < 100kHz
48
48
100
53
dB
dB
µVRMS
µVRMS
ENABLE PIN CHARACTERISTICS
Turn-on Threshold
Hysteresis
ENABLE Pin Turn-on Delay
ENABLE Pin Leakage Current
SOFT-START CHARACTERISTICS
VEN(HIGH)
VEN(HYS)
tEN
COUT = 10µF, ILOAD = 1A
VIN = 6V, ENABLE = 3V
0.5 0.8 1.0
10 80 200
80
1
V
mV
µs
µA
Reset Pull-down Current
Soft-start Charge Current
PG PIN CHARACTERISTICS
IPD
ICHG
VIN = 3.5V, EN = 0V, SS = 1V
0.5 1 1.3 mA
-3.3 -2 -0.8 µA
VOUT PG Flag Threshold
75 84 92 % VOUT
VOUT PG Flag Hysteresis
4%
PG Flag Low Voltage
ISINK = 500µA
47 100
mV
PG Flag Leakage Current
VIN = 6V, PG = 6V
0.05
1
µA
NOTES:
8. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
9. Dropout is defined by the difference in supply VIN and VOUT when the output is below its nominal regulation.
Submit Document Feedback
5
FN7712.4
August 11, 2015
5 Page 
ISL80101A
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you
have the latest revision. (Continued)
DATE
REVISION
CHANGE
September 19, 2011 FN7712.3 Table 1 on page 1 updated to include more information on Intersil's 1A LDO portfolio.
Added standard MSL Note to “Ordering Information” (Note 3)
February 2, 2011
FN7712.2 1. On page 1, “Features”
a."±1.8% Vout Accuracy Guaranteed…" changed to "±2% Vadj Accuracy Guaranteed…"
2. Figure 1 on page 1
a."Typical Applications" changed to "Typical Application"
b."82pF" for Cpb changed to "100pF"
3. On page 3, Pin Number 8
a. On "Description" of ISET, change 2nd sentence from "Current limit is 0.75mA when…" to "Current limit is 1.62A
when…"
4. On page 4, “Electrical Specifications”
a."DC Input Line Regulation" given own line, added symbol, and changed test conditions
b. “Feedback Input Current”, added typical "0.01" and max "1" with units "µA"
5. On page 5, “Electrical Specifications”
a. “PG PIN CHARACTERISTICS” “VOUT PG Flag Threshold”, Typical "85" changed to "84" %Vout
7. On page 8, “Programmable Current Limit”
a. Equation 1 changed to "Ilimit=1.62+…"
b. Equation 2 changed to "Ilimit=1.62-…"
8. Added "The current limit can be decreased from the 0.75A default…" changed to "The current limit can be
decreased from the 1.62A default…" on page 8, between Equation 1 and Equation 2
9. On page 8, beginning of last paragraph
a. "Figure 11 shows the relationship…" changed to "Figure 13 shows the relationship…"
10. “External Capacitor Requirements” on page 8:
a. "The ISL80121-5 applies…" changed to "The ISL80101A applies…
11. On page 4, “Electrical Specifications”, “DC CHARACTERISTICS”, “Output Current Limit”
a. "VOUT = 2V, VIN = 5.5V, RSET = 25.5k " changed to ""VOUT = 2V, VIN = 5.0V, RSET = 25.5k "
12. On page 4, “Electrical Specifications”, “AC CHARACTERISTICS”, “Input Supply Ripple Rejection”
a. "58db" typical changed to "48"
b. "62dB" typical changed to "48"
13. On page 8, revised Figure 13. Updated same graphic on page 1
14. Throughout: All "VIN" changed to "VIN"
15. Throughout: All "VOUT" changed to "VOUT"
16. Throughout: All "RSET" changed to "RSET"
17. Throughout: All "ISET" changed to "ISET"
18. Throughout: All "EN" and "enable" changed to "ENABLE"
19. Throughout: All "PGOOD" changed to "PG"
20. “Block Diagram” on page 2, subscripted pin names for VIN, VOUT, ISET. Changed PGOOD to PG
21. On page 3, EPAD Description
a. "directly to GND plane is optional." Changed to "directly to GND plane is required for thermal considerations.
See “Power Dissipation and Thermals” on page 9 for more details."
22. On page 1, in paragraph 2, "The programmable current limiting improves system reliability of applications"
changed to "The programmable current limiting improves system reliability of end applications."
23. On page 1, “Features”, "Programmable Soft-starting" changed to "Programmable Soft-Start"
24. On page 4, “Electrical Specifications”, “DC CHARACTERISTICS”, "DC Output Voltage Accuracy" changed to “DC
ADJ Pin Voltage Accuracy”
25. On page 5, Notes 10 and 11 deleted (they were not referenced in the spec table).
26. “Output Voltage Selection” on page 8, "An external resistor divider, R2 and R3, is used to set the output voltage
as shown in Equation 5. The recommended value for R3 is 500Ω to 1kΩ. R2 is then chosen according to Equation
6." changed to "An external resistor divider, R2 and R3, is used to set the output voltage as shown in Equations 5
and 6. Please see Table 2 on page 9 for recommended values of R2 and R3."
29. Added “General PowerPAD Design Considerations” on page 10
30. Revised Figure 8
December 6, 2010
FN7712.1 Modified “Block Diagram” on page 2.
In “Ground Pin Current” on page 4 Test Conditions:
-Changed 1st line from "VOUT + 0.4V < VIN < 5V, VSENSE = 0V" to "ILOAD = 0A, 2.2V < VIN <6V"
-Changed 2nd line from "VOUT + 0.4V < VIN < 6V, VSENSE = 0V" to "ILOAD = 1A, 2.2V < VIN <6V"
Figure 2 “DROPOUT vs LOAD” on page 6:
-Switched colors on 25°C and 125°C.
November 29, 2010 FN7712.0 Initial Release
Submit Document Feedback 11
FN7712.4
August 11, 2015
11 Page | ||
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| PDF Descargar | [ Datasheet ISL80101A.PDF ] | |
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