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PDF NTLJS2103P Data sheet ( Hoja de datos )
| Número de pieza | NTLJS2103P | |
| Descripción | Power MOSFET ( Transistor ) | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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NTLJS2103P
Power MOSFET
−12 V, −7.7 A, mCoolt Single P−Channel,
2x2 mm, WDFN Package
Features
• WDFN Package Provides Exposed Drain Pad for Excellent Thermal
Conduction
• 2x2 mm Footprint Same as SC−88 Package
• Lowest RDS(on) Solution in 2x2 mm Package
• 1.2 V RDS(on) Rating for Operation at Low Voltage Logic Level Gate
Drive
• Low Profile (< 0.8 mm) for Easy Fit in Thin Environments
• This is a Pb−Free Device
Applications
• High Side Load Switch
• DC−DC Converters (Buck and Boost Circuits)
• Optimized for Battery and Load Management Applications in
Portable Equipment
• Li−Ion Battery Linear Mode Charging
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Symbol Value
Unit
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain
Current (Note 1)
Steady
State
Power Dissipation
(Note 1)
t≤5s
Steady
State
Continuous Drain
Current (Note 2)
Power Dissipation
(Note 2)
t≤5s
Steady
State
TA = 25°C
TA = 85°C
TA = 25°C
TA = 25°C
TA = 25°C
TA = 85°C
TA = 25°C
VDSS
VGS
ID
PD
ID
PD
−12
±8.0
−5.9
−4.2
−7.7
1.9
3.3
−3.5
−2.5
0.7
V
V
A
W
A
W
Pulsed Drain Current
tp = 10 ms
IDM
Operating Junction and Storage Temperature TJ, TSTG
−24
−55 to
150
A
°C
Source Current (Body Diode) (Note 2)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
IS −2.7 A
TL 260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq
[2 oz] including traces).
2. Surface Mounted on FR4 Board using the minimum recommended pad size,
(30 mm2, 2 oz Cu).
www.DataSheet4U.com
http://onsemi.com
V(BR)DSS
−12 V
RDS(on) TYP
25 mW @ −4.5 V
35 mW @ −2.5 V
45 mW @ −1.8 V
60 mW @ −1.5 V
95 mW @ −1.2 V
S
ID MAX (Note 1)
−5.9 A
−5.3 A
−2.0 A
−1.0 A
−0.2 A
G
P−CHANNEL MOSFET
S
Pin 1
D
D
MARKING
DIAGRAM
WDFN6
CASE 506AP
1
2
J7MG
6
5
3G 4
J7 = Specific Device Code
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
D1
6D
D2
G3
D
S
5D
4S
(Top View)
ORDERING INFORMATION
Device
Package
Shipping†
NTLJS2103PTAG WDFN6 3000/Tape & Reel
(Pb−Free)
NTLJS2103PTBG WDFN6 3000/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2009
July, 2009 − Rev. 2
1
Publication Order Number:
NTLJS2103P/D
1 page  
NTLJS2103P
TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
100
10 1 ms
10 ms
1
VGS = −8 V
SINGLE PULSE
0.1 TC = 25°C
dc
RDS(on) LIMIT
Package Limit
0.01 Thermal Limit
0.1 1
10
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
100
Figure 13. Maximum Rated Forward Biased
Safe Operating Area
www.DataSheet4U.com
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.01
0.0001
P(pk)
Single Pulse
0.001
0.01
0.1 1
PULSE TIME (s)
t1
t2
DUTY CYCLE, D = t1/t2
Test Type = 1 sq in 2 oz
RqJA = 1 sq in 2 oz
10 100 1000
Figure 14. FET Thermal Response
http://onsemi.com
5
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| PDF Descargar | [ Datasheet NTLJS2103P.PDF ] | |
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