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PDF TMP90PH44 Data sheet ( Hoja de datos )
| Número de pieza | TMP90PH44 | |
| Descripción | CMOS 8-bit Microcontrollers | |
| Fabricantes | Toshiba | |
| Logotipo |  |
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TOSHIBA
TLCS-90 Series
CMOS 8–Bit Microcontrollers
TMP90PH44N/TMP90PH44F
1. Outline and Characteristics
The TMP90PH44 is a system evaluation LSI having a built-in
One-Time PROM for (16K byte) for TMP90C844.
A programming and verification for the internal PROM is
achieved by using a general EPROM programmer with an
adapter socket.
TMP90PH44
The function of this device is exactly the same as the
TMP90C844 by programming to the internal PROM.
The different points between TMP90PH44 and
TMP90C844 are the memory size (ROM/RAM).
The TMP90PH44N is in a Shrink Dual Inline Package.
(SDIP64-P-750)
The TMP90PH44F is in a Quad Flat Package.
(QFP64-P-1420A)
The following are the memory map of TMP90PH44 and
TMP90C844.
Figure 1.1. TMP90PH44
Figure 1.2. TMP90C844
Parts No.
TMP90PH44N
TMP90PH44F
ROM
OTP
16384 x 8bit
RAM
512 x 8bit
Package
64-SDIP
64-QFP
Adapter Socket
No.
BM1148
(Under Development)
BM1149
(Under Development)
The information contained here is subject to change without notice.
The information contained herein is presented only as guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties
which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of TOSHIBA or others. These TOSHIBA products are intended for usage in general electronic
equipments (office equipment, communication equipment, measuring equipment, domestic electrification, etc.) Please make sure that you consult with us before you use these TOSHIBA products in equip-
ments which require high quality and/or reliability, and in equipments which could have major impact to the welfare of human life (atomic energy control, spaceship, traffic signal, combustion control, all types
of safety devices, etc.). TOSHIBA cannot accept liability to any damage which may occur in case these TOSHIBA products were used in the mentioned equipments without prior consultation with TOSHIBA.
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1 page  
2.2 Pin Names and Functions
The TMP90PH44 has MCU mode and PROM mode.
TMP90PH44
(1) MCU Mode (The TMP90C844 and the TMP90PH44
are pin compatible).
Pin Name
P00 ~ P07
/AD0 ~ AD7
P10 ~ P17
/A8 ~ A15
P20 ~ P27
/SB0 ~ SB7
/WAIT
P30 ~ P37
/SWR
/SRD
/SCS
C/D
/STA
RxD
/SCLK
/TxD
P40 ~ P47
/TO1, 3, 4, 5
/TI0, 2, 4, 5
/INT0
/INT1
INT2
P50 ~ P53
/AN0 ~ AN3
P56
/RD
No. of pins
8
8
8
(8)
(1)
8
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
8
(4)
(4)
(1)
(1)
(1)
4
1
Table 2.2 Pin Names and Functions (1/2)
I/O or tristate
Function
I/O
/Tristate
I/O
Output
I/O
/Input
Port 0: An 8-bit I/O port. Each bit can be set for input or output.
Address/Data bus: Operates as an 8-bit bidirectional address bus or data bus when using external memory
Port 1: An 8-bit I/O port. Each bit can be set for input or output.
Address bus:Operates as an address bus (upper 8 bits) when using external memory.
Port 2: An 8-bit I/O port. Each bit can be set for input or output.
Slave bus: When used a s a slave processor,
operates as the slave bue for the transfer data to and from the master processor.
Wait: Used as an input pin when memory or perpheral LSIs with slow access times are controlled.
I/O
/Input
/Input
Port 3: 8-bit I/O port which allows I/O selection on bit basis (with programmable pull-up resistor).
Slave write: The strobe signal input to write data from the master processor.
Slave read: The strobe signal used by the master processor to read data.
/Input
Input
/Output
Input
/I/O
/Output
I/O
/Output
/Input
/Input
/Input
/Input
Input
Output
Slave chip select: The chip select signal input from the master processor.
Command/data: The command/data select signal input from the master processor.
Status output: Used to report the slave bus status to the master processor.
Serial receive data
Serial clock
Serial transmit data
Port 4: 8-bit I/O port which allows I/O section on bit basis (with programmable pull-up resistor).
Timer outputs 1, 3, 4, and 5: Output for timer 0, or timer 1, timer 2, timer 3 and timer 4 (2 lines).
Timer inputs 0, 2, 4, and 5: Input for timer 0, or timer 1, timer 2 and timer 4 (2 lines).
Interrupt request terminal 0: Interrupt request pin 0: Level/rise edge programmable interrupt request pin
Interrupt request terminal 1: Interrupt request pin 1: Rise/fall edge programmable interrupt request pin.
Interrupt request terminal 2: Interrupt request pin 2: Rise edge interrupt request pin.
Port 50 ~ 53: 1-bit output ports.
Analog input: 4 analog inputs to A/D converter.
Port 56: A 1-bit output port.
Read: Strobe signal output for reading external memory.
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4.3 AC Characteristics
Symbol
Parameter
tOSC
tCYC
tWH
tWL
tAL
tLA
tLL
tLC
tCL
tACL
tACH
tCA
tADL
tADH
tRD
tRR
tHR
tRAE
tWW
tDW
tWD
tACKH
tACKL
tCKHA
tCCK
tCKHC
tDCK
tCWA
Oscillation cycle ( = x)
CLK Period
CLK High width
CLK Low width
A0 ~ 7 effective address→ALE fall
ALE fall →A0 ~ 7 hold
ALE Pulse width
ALE fall RD/WR fall
RD/WR →ALE rise
A0 ~ 7 effective address →RD/WR fall
Upper effective address →RD/WR fall
RD/WR fall →Upper address hold
A0 ~ 7 effective address →Effective data input
Upper effective address →Effective data input
RD fall →Effective data input
RD Pulse width
RD rise →Data hold
RD rise→ Address enable
WR pulse width
Effective data→WR rise
WR rise→Effective data hold
Upper address→CLK fall
Lower address →CLK fall
CLK fall→Upper address hold
RD/WR→CLK fall
CLK fall→RD/WR rise
Valid data CLK fall
RD/WR fall→Valid WAIT
4.4 A/D Conversion Characteristics
Symbol
Parameter
VREF
AGND
VAIN
IREF
Error
(Quantize
error of ± 0.5
LSB not
included)
Analog reference voltage
Analog reference voltage
Analog input voltage range
Supply current for analog reference voltage
Total error
(TA = 25°C, Vcc = VREF = 5.0V)
Total error
TMP90PH44
Variable
Min
80
4x
2x - 40
2x - 40
0.5x - 15
0.5x - 15
x - 40
0.5x - 30
0.5x - 20
x - 25
1.5x - 50
0.5x - 20
–
–
–
2.0x - 40
0
x - 15
2.0x - 40
2.0x - 50
0.5x - 10
2.5x - 50
2.0x - 50
1.5x - 80
x - 25
x - 60
x - 50
–
Max
1000
4x
–
–
–
–
–
–
–
–
–
–
3.0x - 35
3.5x - 55
2.0x - 50
–
–
–
–
–
–
–
–
–
–
–
–
x - 40
VCC = 5V ± 10% TA = -20 ~ 70°C (1 ~ 16MHz)
12.5MHz Clock
Min Max
16MHz Clock
Min Max
Unit
80 – 62.5 – ns
320 – 250 – ns
120 – 85 – ns
120 – 85 – ns
25 – 16 – ns
25 – 16 – ns
40 – 23 – ns
10 – 1 – ns
20 – 11 – ns
55 – 38 – ns
70 – 44 – ns
20 – 11 – ns
– 205 – 153 ns
– 225 164 164 ns
– 110 – 75 ns
120 – 85 – ns
0 – 0 – ns
65 – 48 – ns
120 – 85 – ns
110 – 75 – ns
30 – 21 – ns
150 – 106 – ns
110 – 75 – ns
40 – 13 – ns
55 – 37 – ns
20 – 2 – ns
30 – 12 – ns
– 40 – 22 ns
Condition
Vcc - 1.5
Vss
Vss
–
–
–
VCC = 5V ± 10% TA = -020 ~ 70°C
f = 1 ~ 16MHz
Min Max
Vcc Vcc
Vss Vss
– Vcc
0.5 1.0
Unit
V
mA
– 1.0
– 2.5
LSB
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