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PDF MB96380 Data sheet ( Hoja de datos )
| Número de pieza | MB96380 | |
| Descripción | 16-bit Proprietary Microcontroller | |
| Fabricantes | Fujitsu | |
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FUJITSU SEMICONDUCTOR
DATA SHEET
FME-MB96380 rev 10
16-bit Proprietary Microcontroller
CMOS
F2MC-16FX MB96380 Series
MB96384*1/385*1
MB96F385*1/F386/F387/F388*1/F389*1
■ DESCRIPTION
MB96380 series is based on Fujitsu’s advanced 16FX architecture (16-bit with instruction pipeline for RISC-like
performance). The CPU uses the same instruction set as the established 16LX series - thus allowing for easy
migration of 16LX Software to the new 16FX products. 16FX improvements compared to the previous generation
include significantly improved performance - even at the same operation frequency, reduced power consumption
and faster start-up time.
For highest processing speed at optimized power consumption an internal PLL can be selected to supply the
CPU with up to 56MHz operation frequency from an external 4MHz resonator. The result is a minimum instruction
cycle time of 17.8ns going together with excellent EMI behavior. An on-chip clock modulation circuit significantly
reduces emission peaks in the frequency spectrum. The emitted power is minimized by the on-chip voltage
regulator that reduces the internal CPU voltage. A flexible clock tree allows to select suitable operation frequencies
for peripheral resources independent of the CPU speed.
*1: These devices are under development and specification is preliminary. These products under development may
change its specification without notice.
Note: F2MC is the abbreviation of Fujitsu Flexible Microcontroller
For the information for microcontroller supports, see the following web site.
This web site includes the "Customer Design Review Supplement" which provides the latest cautions on
system development and the minimal requirements to be checked to prevent problems before the system
development.
http://edevice.fujitsu.com/micom/en-support/
Copyright©2010 FUJITSU SEMICONDUCTOR LIMITED All rights reserved
2010.6
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1 page  
MB96380 Series
Feature
Description
• Edge sensitive or level sensitive
External Interrupts
• Interrupt mask and pending bit per channel
• Each available CAN channel RX has an external interrupt for wake-up
• Selected USART channels SIN have an external interrupt for wake-up
• Disabled after reset
• Once enabled, can not be disabled other than by reset.
Non Maskable Interrupt
• Level high or level low sensitive
• Pin shared with external interrupt 0.
• 8-bit or 16-bit bidirectional data
• Up to 24-bit addresses
• 6 chip select signals
• Multiplexed address/data lines
External bus interface
• Non-multiplexed address/data lines
• Wait state request
• External bus master possible
• Timing programmable
Alarm comparator
• Monitors an external voltage and generates an interrupt in case of a voltage lower or
higher than the defined thresholds
• Threshold voltages defined externally or generated internally
• Status is readable, interrupts can be masked separately
• Virtually all external pins can be used as general purpose I/O
• All push-pull outputs (except when used as I2C SDA/SCL line)
• Bit-wise programmable as input/output or peripheral signal
I/O Ports
• Bit-wise programmable input enable
• Bit-wise programmable input levels: Automotive / CMOS-Schmitt trigger / TTL
• Bit-wise programmable pull-up resistor
• Bit-wise programmable output driving strength for EMI optimization
Package
• 120-pin plastic LQFP
• Supports automatic programming, Embedded Algorithm
• Write/Erase/Erase-Suspend/Resume commands
• A flag indicating completion of the algorithm
• Number of erase cycles: 10,000 times
Flash Memory
• Data retention time: 20 years
• Erase can be performed on each sector individually
• Sector protection
• Flash Security feature to protect the content of the Flash
• Low voltage detection during Flash erase
FME-MB96380 rev 10
5
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5 Page 
MB96380 Series
Pin Function description (2 of 3)
Pin name
INTn_R
LBX
MDn
NMI
OUTn
OUTn_R
Pxx_n
PPGn
PPGn_R
PWMn
RDX
RDY
RSTX
RXn
SCKn
SCLn
SDAn
SEGn
SGA
SGO
SGA_R
SGO_R
SINn
SOTn
TINn
TINn_R
TOTn
TOTn_R
TTGn
TXn
Feature
External Interrupt
External bus
Core
External Interrupt
OCU
OCU
GPIO
PPG
PPG
SMC
External bus
External bus
Core
CAN
USART
I2C
I2C
LCD
Sound Generator
Sound Generator
Sound Generator
Sound Generator
USART
USART
Reload Timer
Reload Timer
Reload Timer
Reload Timer
PPG
CAN
FME-MB96380 rev 10
Description
Relocated External Interrupt n input
External Bus Interface Lower Byte select strobe output
Input pins for specifying the operating mode.
Non-Maskable Interrupt input
Output Compare Unit n waveform output
Relocated Output Compare Unit n waveform output
General purpose IO
Programmable Pulse Generator n output
Relocated Programmable Pulse Generator n output
SMC PWM high current
External bus interface read strobe output
External bus interface external wait state request input
Reset input
CAN interface n RX input
USART n serial clock input/output
I2C interface n clock I/O input/output
I2C interface n serial data I/O input/output
LCD segment n
SG amplitude output
SG sound/tone output
Relocated SG amplitude output
Relocated SG sound/tone output
USART n serial data input
USART n serial data output
Reload Timer n event input
Relocated Reload Timer n event input
Reload Timer n output
Relocated Reload Timer n output
Programmable Pulse Generator n trigger input
CAN interface n TX output
11
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| Páginas | Total 70 Páginas | |
| PDF Descargar | [ Datasheet MB96380.PDF ] | |
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