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PDF LT1952-1 Data sheet ( Hoja de datos )
| Número de pieza | LT1952-1 | |
| Descripción | Single Switch Synchronous Forward Controller | |
| Fabricantes | Linear Technology | |
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FEATURES
n Synchronous Rectifier Control for High Efficiency
n Programmable Volt-Second Clamp
n Output Power Levels from 25W to 500W
n Low Current Start-Up
(LT1952: 460μA; VIN On/Off = 14.25V/8.75V)
(LT1952-1: 400μA; VIN On/Off = 7.75V/6.5V)
n True PWM Soft-Start
n Low Stress Short-Circuit Protection
n Precision 107mV Current Limit Threshold
n Adjustable Delay for Synchronous Timing
n Accurate Shutdown Threshold with Programmable
Hysteresis
n Programmable Slope Compensation
n Programmable Leading Edge Blanking
n Programmable Frequency (100kHz to 500kHz)
n Synchronizable to an External Clock up to 1.5 • fOSC
n Internal 1.23V Reference
n 2.5V External Reference
n Current Mode Control
n Small 16-Pin SSOP Package
APPLICATIONS
n Telecommunications Power Supplies
n Industrial and Distributed Power
n Isolated and Non Isolated DC/DC Converters
LT1952/LT1952-1
Single Switch Synchronous
Forward Controller
DESCRIPTION
The LT®1952/LT1952-1 are current mode PWM controllers
optimized to control the forward converter topology, using
one primary MOSFET. The LT1952/LT1952-1 provide
synchronous rectifier control, resulting in extremely
high efficiency. A programmable Volt-Second clamp
provides a safeguard for transformer reset that prevents
saturation. This allows a single MOSFET on the primary
side to reliably run at greater than 50% duty cycle for high
MOSFET, transformer and rectifier utilization. The devices
include soft-start for controlled exit from shutdown and
undervoltage lockout. A precision 107mV current limit
threshold, independent of duty cycle, combines with soft-
start to provide hiccup short-circuit protection. The LT1952
is optimized for micropower bootstrap start-up from high
input voltages. The LT1952-1 allows start-up from lower
input voltages. Programmable slope compensation and
leading edge blanking allow optimization of loop bandwidth
with a wide range of inductors and MOSFETs. Each device
can be programmed over a 100kHz to 500kHz frequency
range and the part can be synchronized to an external
clock. The error amplifier is a true op amp, allowing a wide
range of compensation networks. The LT1952/LT1952-1
are available in a small 16-pin SSOP package.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
36V to 72V Input, 12V at 20A Semi-Regulated Bus Converter
SUPPLY FROM BIAS
WINDING OF T1
VIN T1
40k PA0905
16V 10μF
VREF
VIN
52.3k
COMP
VIN
340k
SS_MAXDC
OUT
LT1952/ OC
LT1952-1
ISENSE
Si7450
0.005Ω
Si7370
s2
100k
SD_VSEC
LTC3900
13k FB
SYNC
SOUT
FG CG
T2
SYNC
L1
PA1494.242
VOUT
12V
20A
PH4840
s2
47μF
16V
X5R
s2
GND
ROSC
220pF
560Ω
0.1μF 0.1μF
PGND BLANK DELAY
40k 40k 178k
1952 TA01
12V Bus Converter
VOUT vs VIN
16
14
12
10
8
36 42 48 54 60 66 72
VIN (V)
1952 TA01b
19521fd
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TYPICAL PERFORMANCE CHARACTERISTICS
LT1952/LT1952-1
FB Voltage vs Temperature
1.25
1.24
1.23
1.22
1.21
1.20
–50 –25
0 25 50 75
TEMPERATURE (°C)
100 125
1952 G01
VIN Start-up Current
vs Temperature
600
SD_VSEC = 1.4V
550
500
LT1952
450
400
350
LT1952-1
300
250
200
–50 –25
0 25 50 75
TEMPERATURE (°C)
100 125
1952 G04
SD_VSEC Pin Current
vs Temperature
15
PIN CURRENT BEFORE
PART TURN ON
10
5
0
–50 –25
0mA PIN CURRENT AFTER
PART TURN ON
0 25 50 75 100 125
TEMPERATURE (°C)
1952 G07
Switching Frequency
vs Temperature
245
230
215
200
185
170
155
–50 –25
0 25 50 75
TEMPERATURE (°C)
100 125
1952 G02
VIN IQ vs Temperature
6.5
OC = OPEN
6.0
5.5
5.0
4.5
4.0
3.5
–50 –25
0 25 50 75
TEMPERATURE (°C)
100 125
1952 G05
VIN Turn ON/OFF Voltage
vs Temperature
18
16
LT1952 VIN TURN ON VOLTAGE
14
12
10
LT1952 VIN TURN OFF VOLTAGE
8
LT1952-1 VIN ON LT1952-1 VIN OFF
6
–50 –25
0 25 50 75 100 125
TEMPERATURE (°C)
1952 G08
VIN Shutdown Current
vs Temperature
500
VIN = 15V
450 SD_VSEC = 0V
400
350
300
250
200
150
100
–50 –25
0 25 50 75
TEMPERATURE (°C)
100 125
1952 G03
SD_VSEC Turn ON Threshold
vs Temperature
1.42
1.37
1.32
1.27
1.22
–50 –25
0 25 50 75
TEMPERATURE (°C)
100 125
1952 G06
COMP Active Threshold
vs Temperature
1.6
RISENSE = 0k
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
–50 –25
0 25 50 75
TEMPERATURE (°C)
100 125
1952 G09
19521fd
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LT1952/LT1952-1
OPERATION
catastrophic damage. Many converters solve this problem
by limiting the operational duty cycle of the MOSFET to
50% or less—or by using a fixed (non-adaptive) maximum
duty cycle clamp with very large voltage rated MOSFETs.
The LT1952/LT1952-1 provide a volt-second clamp to
allow MOSFET duty cycles well above 50%. This gives
greater power utilization for the MOSFET, rectifiers and
transformer resulting in less space for a given power
output. In addition, the volt-second clamp allows a reduced
voltage rating on the MOSFET resulting in lower RDSON
for greater efficiency. The volt-second clamp defines a
maximum duty cycle ‘guard rail’ which falls when system
input voltage increases.
The LT1952/LT1952-1 SD_VSEC and SS_MAXDC pins
provide a capacitorless, programmable volt-second clamp
solution. Some controllers with volt-second clamps control
switch maximum duty cycle by using an external capacitor
to program maximum switch ON time. Such techniques
have a volt-second clamp inaccuracy directly related to
the error of the external capacitor/pin capacitance and the
error/drift of the internal oscillator. The LT1952/LT1952-
1 use simple resistor ratios to implement a volt-second
clamp without the need for an accurate external capacitor
and with an order of magnitude less dependency on
oscillator error.
An increase of voltage at the SD_VSEC pin causes the
maximum duty cycle clamp to decrease. If SD_VSEC is
resistively divided down from transformer input voltage,
a volt-second clamp is realised. To adjust the initial
maximum duty cycle clamp, the SS_MAXDC pin voltage
is programmed by a resistor divider from the 2.5V VREF
pin to ground. An increase of programmed voltage on
SS_MAXDC pin provides an increase of switch maximum
duty cycle clamp.
Soft-Start
The LT1952/LT1952-1 provide true PWM soft-start by
using the SS_MAXDC pin to control soft-start timing. The
proportional relationship between SS_MAXDC voltage and
switch maximum duty cycle clamp allows the SS_MAXDC
pin to slowly ramp output voltage by ramping the maximum
switch duty cycle clamp—until switch duty cycle clamp
seamlessly meets the natural duty cycle of the converter.
A soft-start event is triggered whenever VIN is too low,
SD_VSEC is too low (UVLO), or a 107mV overcurrent
threshold at OC pin is exceeded. Whenever a soft-start
event is triggered, switching at SOUT and OUT is stopped
immediately.
The SS_MAXDC pin is discharged and only released for
charging when it has fallen below it’s reset threshold
of 0.45V and all faults have been removed. Increasing
voltage on the SS_MAXDC pin above 0.8V will increase
switch maximum duty cycle. A capacitor to ground on
the SS_MAXDC pin in combination with a resistor divider
from VREF, defines the soft-start timing.
Current Mode Topology (ISENSE Pin)
The LT1952/LT1952-1 current mode topology eases fre-
quency compensation requirements because the output
inductor does not contribute to phase delay in the regulator
loop. This current mode technique means that the error
amplifier (nonisolated applications) or the optocoupler
(isolated applications) commands current (rather than
voltage) to be delivered to the output. This makes frequency
compensation easier and provides faster loop response
to output load transients.
A resistor divider from the application’s output voltage
generates a voltage at the inverting FB input of the LT1952/
LT1952-1 error amplifier (or to the input of an external
optocoupler) and is compared to an accurate reference
(1.23V for LT1952/LT1952-1). The error amplifier output
(COMP) defines the input threshold (ISENSE) of the current
sense comparator. COMP voltages between 0.8V (active
threshold) and 2.5V define a maximum ISENSE threshold
from 0mV to 220mV. By connecting ISENSE to a sense
resistor in series with the source of an external power
MOSFET, the MOSFET peak current trip point (turn off)
can be controlled by COMP level and hence by the output
voltage. An increase in output load current causing the
output voltage to fall, will cause COMP to rise, increasing
ISENSE threshold, increasing the current delivered to the
output. For isolated applications, the error amplifier COMP
output can be disabled to allow the optocoupler to take
control. Setting FB = VREF disables the error amplifier COMP
output, reducing pin current to (COMP – 0.7)/40k.
19521fd
11
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| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet LT1952-1.PDF ] | |
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